Efficient, Reliable Energy Buffer for Grid-interface Power Conversion with Switched Capacitor Architecture

  • Authors: M. Chen, K. K. Afridi, D. J. Perreault

A buffering strategy that utilizes the ability of a capacitor to efficiently operate over a wide voltage range allows increasing of the effective energy storage density to match that of an electrolytic capacitor[1][2][3]. Previous switched capacitor buffering strategies have been shown to be effective in achieving high capacitor energy utilization; however, they are either too complicated for practical implementation or suffer a large voltage ripple ratio[4][5]. This abstract presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments, which when used with longer life film capacitors overcome this limitation while achieving effective energy densities comparable to electrolytic capacitors. The architectural approach is introduced along with design and control techniques. A prototype SSC energy buffer using film capacitors, designed for a 320-V dc bus and able to support a 135-W load, has been built and tested with a power factor correction circuit. It is shown that the SSC energy buffer can successfully replace limited-life electrolytic capacitors with much longer life film capacitors while maintaining volume and efficiency at a comparable level. There are many possible implementations of the SSC energy buffer, enabling tradeoffs between complexity and performance[6][7][8][9]. The optimal choice of the circuit topology depends on the dc bus voltage levels and the voltage ripple ratios of the specific applications. As technology evolves, the size and cost of both semiconductor switches and controls continue to reduce, yielding a further benefit of the SSC energy buffer architecture.

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  7. M. Chen, Stacked Switched Capacitor Energy Buffer Architecture, Master’s thesis, Massachusetts Institute of Technology, Cambridge, 2011. [↩]
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