All entries for k. k. afridi

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Efficient, Reliable Energy Buffer for Grid-interface Power Conversion with Switched Capacitor Architecture

• Authors: M. Chen, K. K. Afridi, D. J. Perreault

A buffering strategy that utilizes the ability of a capacitor to efficiently operate over a wide voltage range allows increasing of the effective energy storage density to match that of an electrolytic capacitor^[1][2][3]. Previous switched capacitor buffering strategies have been shown to be effective in achieving high capacitor energy utilization; however, they are either too complicated for practical implementation or suffer a large voltage ripple ratio^[4][5]. This abstract presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments, which when used with longer life film capacitors overcome this limitation while achieving effective energy densities comparable to electrolytic capacitors. The architectural approach is introduced along with design and control techniques. A prototype SSC energy buffer using film capacitors, designed for a 320-V dc bus and able to support a 135-W load, has been built and tested with a power factor correction circuit. It is shown that the SSC energy buffer can successfully replace limited-life electrolytic capacitors with much longer life film capacitors while maintaining volume and efficiency at a comparable level. There are many possible implementations of the SSC energy buffer, enabling tradeoffs between complexity and performance^[6][7][8][9]. The optimal choice of the circuit topology depends on the dc bus voltage levels and the voltage ripple ratios of the specific applications. As technology evolves, the size and cost of both semiconductor switches and controls continue to reduce, yielding a further benefit of the SSC energy buffer architecture.



Figure 1: Circuit diagram of a 1-2 unipolar stacked switching capacitor energy buffer.



Figure 2: Relative size of passive energy storage components in different energy buffer architectures.




1. B. J. Pierquet and D. J. Perreault, “Single-Phase Photovoltaic Inverter Topology with Series-Connected Power Buffer,” Proceedings of IEEE Energy Conversion Congress and Exposition (ECCE), Sep. 2010. [↩]
2. A. C. Kyritsis and E. C. Tatakis, “A Novel Parallel Active Filter for Current Pulsation Smoothing on Single Stage Grid-Connected AC-PV Modules,” Proceedings of the 11th European Conference on Power Electronics and Applications (EPE), Aalborg, Denmark, Sep. 2007. [↩]
3. T. Shimizu, K. Wada and N. Nakamura, “Flyback-Type Single-Phase Utility-Interactive Inverter With Power Pulsation Decoupling on the DC Input for an AC Photovoltaic Module System,” IEEE Transactions on Power Electronics, vol. 21, no. 5, pp. 1264-1272, Sep. 2006. [↩]
4. S. Sugimoto, S. Ogawa, H. Katsukawa, H. Mizutani, and M. Okamura, “A Study of Series-Parallel Changeover Circuit of a Capacitor Bank for an Energy Storage System Utilizing Electric Double-layer Capacitors,” Electrical Engineering in Japan, vol. 145, pp. 33-42, 2003 [↩]
5. X. Fang, N. Kutkut, J. Shen, and I. Batarseh, “Ultracapacitor Shift Topologies with High Energy Utilization and Low Voltage Ripple,” International Telecommunications Energy Conference (INTELEC), Orlando, FL, Jun. 2010. [↩]
6. M. Chen; Afridi, K.K.; Perreault, D.J., “Stacked Switched Capacitor Energy Buffer Architecture,”  IEEE Transactions on Power Electronics, vol.28, no.11, pp.5183,5195, Nov. 2013. [↩]
7. M. Chen, Stacked Switched Capacitor Energy Buffer Architecture, Master’s thesis, Massachusetts Institute of Technology, Cambridge, 2011. [↩]
8. M. Chen, K. K. Afridi, and D. J. Perreault, “Stacked Switched Capacitor Energy Buffer Architecture,” Proceedings of the IEEE Applied Power Electronics Conference (APEC), Orlando, FL, Feb. 2012. [↩]
9. K. K. Afridi, M. Chen, and D. J. Perreault, “Enhanced Bipolar Stacked Switched  Capacitor Energy Buffers,” Proceedings of the IEEE Energy Conversion Congress and Exposition (ECCE), pp. 4209-4216, Raleigh, NC, Sep. 2012. [↩]