All entries for yu-chung hsiao

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Compact Modeling for Silicon Photonic Wavelength Selective Switches

• Authors: Y.-C. Hsiao, S. Ghadarghadr, M. Watts, L. Daniel
• Sponsorship: NSF

Silicon photonic wavelength selective switches have been recently demonstrated by the Photonic Microsystems Group, led by Prof. Watts, and hold promise for alleviating communication bottlenecks in data centers and supercomputers. The dual disks of the switches (top of Figure 1), coupling lightwaves through nano-gaps, operate by applying a forward bias across the vertical p-n junction to shift the frequency band-pass between optical channels^[1]. Arrays of wavelength selective switches configured into switching fabrics (bottom of Figure 1) can be used to route high-speed optical data without first converting to the electrical domain, thereby saving power, reducing complexity, and enabling scaling in port count and aggregate bandwidth substantially beyond what can be achieved with electrical communications alone.

A limiting factor for designing switching fabrics is the ability to accurately model and predict the optical and electrical behaviors of a switch network. Such large-scale simulation is made possible only when compact models faithfully capture the dynamics of all individual switches. A hybrid method consisting of both analytical and numerical modeling is proposed for achieving good accuracy. The automatic nonlinear system identification algorithm^[2], proposed recently by the Computational Prototyping Group, led by Prof. Daniel, will be able to calibrate low-order analytical models against measurement for detailed nonlinearities, such as time-domain switching (top of Figure 2) and frequency-domain band-passing (bottom of Figure 2). The resulting dynamical state-space models will be physically faithful, numerically stable, and network composable. The last property will ensure that interconnected switches can be simulated in a numerical stable manner. Our proposed solution for having such guarantees will synthesize a proper constraint in the form of a sum of squares of polynomials certifying a rate bound for a storage function. In addition, the models will be parameterized in order to enable system-level optimization.



Figure 1: Top: dual disks of switches. Bottom: switching fabrics.



Figure 2: Top: time-domain electrical switching. Bottom: frequency-domain optical band-passing




1. M. Watts, D. Trotter, and R. Young, “Maximally Confined High-Speed Second-Order Silicon Microdisk Switches,” in Optical Fiber Communication Conference/National Fiber Optic Engineers Conference, OSA Technical Digest (CD), 2008, paper PDP14. [↩]
2. B. N. Bond, Z. Mahmood, Y. Li, R. Sredojevic, A. Megretski, V. Stojanovi, Y. Avniel, and L. Daniel, “Compact Modeling of Nonlinear Analog Circuits Using System Identification via Semidefinite Programming and Incremental Stability Certification,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and System, vol. 29, no. 8, pp. 1149-1162, Aug. 2010. [↩]

Compact Modeling Techniques for Enabling Full-Body Cardiovascular Simulation

• Authors: Y.-C. Hsiao, Y. Vassilevski, S. Simakov, L. Daniel
• Sponsorship: MIT-Skoltech

The recent development of cardiovascular simulation furthers the understanding of physiological conditions of blood-related disorders. For example, detailed finite volume simulation of aorta segments has revealed the susceptible sites for atherosclerotic lesion formation^[1]. The simulated interaction between a thrombus and an installed intravenous filter in a single vena cava described in^[2] reflects the concerns of device migration and failure due to the change of velocity and pressure profile. When performing simulation at the “full-body” level, the state-of-the-art techniques rely on significant approximations of components of the circulatory network to circumvent formidable complexity. For instance, organs and capillaries are simplified as lumped pressure resistance; vessels are manually reduced to one or two-dimensions; Navier-Stokes equations are linearized; and the elasticity of vessel walls is selectively neglected^[3]. The aforementioned approximations are typically performed empirically. Therefore, the aggregate loss of accuracy and the missing nonlinear behaviors at the full-body level are difficult to predict.

In this project, we are developing algorithms that can automatically construct nonlinear dynamical models from terminal pressure-flow relationships and guarantee that the models are accurate, compact, and suitable for network composition^[4]). We use physics-specific field solvers that do not compromise on accuracy to construct elaborate local models for circulatory parts, such as porous types of organs, tree-like capillaries, and general vessel bifurcation where turbulent flows may occur (Figure 1). Our algorithms then extract efficient and compact models. Such an approach enables large-scale network modeling that is computationally feasible and able to capture the previously neglected nonlinear phenomena. When we search for optimal model coefficients, our algorithms ensure that the resulting models do not generate energy, which in turn implies that a composed network is also dissipative. Hence the full-body network can be composed bottom-up and behave stably in time-domain simulations.



Figure 1: Left: Pressure profile of a vessel bifurcation solved by finite element method. Length of each branch is chosen such that Poiseuille flow is fully developed to satisfy network port assumptions. Right: Compact model extracted by our algorithms. Models can be further parameterized with vessel geometries.



Figure 2: A 20-cm artery is constructed by cascading two 10-cm artery models terminated with a matched load. The transient simulation results of the cascaded model are compared with those of a 20-cm artery solved by our immersed boundary method solver.




1. J. R. Buchanan, C. Kleinstreuer, S. Hyun, and G. A. Truskey, “Hemodynamics simulation and identification of susceptible sites of atherosclerotic lesion formation in a model abdominal aorta,” Journal of Biomechanics, vol. 36, issue 8, pp. 1185-1196, Aug. 2003. [↩]
2. Y. V. Vassilevski, S. S. Simakov, and S. A. Kapranov, “A multi-model approach to intravenous filter optimization,” International Journal for Numerical Methods in Biomedical Engineering, vol. 26, issue 7, pp. 915-925, July 2010. [↩]
3. A. Quarteroni, M. Tuveri, and A. Veneziani “Computational vascular fluid dynamics: problems, models and methods,” Computing and Visualization in Science, vol. 2, no. 4, pp. 163-97, 2000. [↩]
4. B. Bond, T. Moselhy, and L. Daniel, “System identification techniques for modeling of the human arterial system,” in Proc. SIAM Conference on the Life Sciences, Pittsburgh, PA, July 2010, p. 12-15. (invited [↩]

CAPLET: Field-solver Accurate Real-time Capacitance Extraction Toolkit using Instantiable Basis Functions

• Authors: Y.-C. Hsiao, T. El-Moselhy, S. Grivet-Talocia, L. Daniel
• Sponsorship: SRC/FCRP IFC, SRC/FCRP GRC, Mentor Graphics, AMD, Freescale

Traditional capacitance extraction for VLSI interconnects usually adopts 2D scanning and table look-up methods for fast extraction at acceptable accuracy. However, for certain full-3D structures, such as partially overlapping wires and comb capacitors, 2D scanning methods fail to generate accurate results (within 5% errors). Therefore, using 3D field solvers becomes necessary despite the much slower performance. Some accelerated capacitance extraction field solvers have been proposed in the past decades, e.g., FASTCAP^[1] and pre-corrected FFT ^[2], whose accelerations are effective only for large, semi-global structures of hundreds of wires. More importantly,^[3] and^[4] have demonstrated that the two acceleration methods are not efficiently parallelizable, showing rapid degradation of parallel efficiency with the number of cores (40% to 60% at eight cores).

This work targets the sub-second extraction performance within 5% errors for small-to-medium-sized structures of tens of wires. We adopt our instantiable basis functions (Figure 1(a)) developed in ^[5] as compact representations of charge distribution in a boundary element method. Such compactness both provides acceleration in serial execution (6x faster than FASTCAP for the NAND gate in Figure 1(b)), and achieves linear scalability of parallel efficiency (Figure 2). The key idea is that using such compact representations reduces the parallelization bottleneck, system solving computation, for from the original 90% of total computation to less than 5%. Hence the embarrassingly parallelizable part, filling the system matrix, is now dominant (from 10% of total computation to more than 95%)^[6]. In four-core parallel execution, we achieve a 38-ms extraction time for an inverter and 190-ms for a NAND gate. Our toolkit can directly handle GDS2 layouts to generate capacitance matrices and 3D visualization (Figure 1(b)). Our code is available in the public domain at http://www.rle.mit.edu/cpg/codes/caplet/index.html.



Figure 1: (a) Charge distribution represented by 572 piecewise constant basis functions (left) and 17 instantiable basis functions (right). Capacitance errors for both cases are 2% w.r.t. a reference capacitance value extracted by standard BEM with fine discretization. (b) CAPLET GUI and NAND gate visualization.



Figure 2: A 24×24 bus example (top) and its parallel efficiency comparison (bottom) with the algorithms in [3] and [4].




1. K. Nabors and J. White, “Fast-Cap: A Multipole-Accelerated 3-D Capacitance Extraction Program,” IEEE Transactions on Computer-Aided Design, vol.10, no. 10, pp. 1447-1459, Nov. 1991. [↩]
2. J. R. Phillips and J. K. White, “A Precorrected-FFT method for Electrostatic Analysis of Complicated 3-D Structures,” IEEE Transaction on Computer-Aided Design, vol. 16, no.10, pp. 059-1072, Oct. 1997. [↩]
3. Y. Yuan and P. Banerjee, “A parallel implementation of a fast multipole-based 3-d capacitance extraction program on distributed memory multicomputers,” Journal of Parallel and Distributed Computing, 61(12): 1751–1774, 2001. [↩]
4. N. R. Aluru, V. B. Nadkarni, and J. White, “A parallel precorrected fft based capacitance extraction program for signal integrity analysis,” Proceedings of the 33^rd annual Design Automation Conference, DAC ’96, New York, NY, USA, pp. 363–366. [↩]
5. Y.-C. Hsiao, T. El-Moselhy, and L. Daniel. “Efficient capacitance solver for 3d interconnect based on template-instantiated basis functions,” IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS ’09. pp. 179–182, Oct. 2009. [↩]
6. Y.-C. Hsiao and L. Daniel, “A highly scalable parallel boundary element method for capacitance extraction,” in Proceedings of the 48^th Annual Design Automation Conference, DAC 2011, San Diego, CA, USA, pp. 552-557. [↩]