All entries for saurav bandyopadhyay

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A 93% Efficiency Reconfigurable Switched-Capacitor DC-DC Converter Using On-Chip Ferroelectric Capacitors

• Authors: D. El-Damak, S. Bandyopadhyay, A. P. Chandrakasan
• Sponsorship: Texas Instruments Graduate Fellowship for Women in Microelectronics

Switched-Capacitor (SC) DC-DC converters have gained significant interest as promising candidates for  integrated power conversion solution that eliminates the need for inductors. However, SC converters efficiency is limited by the conduction loss, bottom plate parasitic capacitance, and gate drive loss in addition to the overhead of the control circuits. In this work, we exploit on-chip ferroelectric capacitors (FeCaps) for charge transfer owing to their high density and extremely low bottom plate parasitic capacitance. High-efficiency conversion is achieved by combining the FeCaps with multi-gain setting converter in a reconfigurable architecture with dynamic gain selection. Figure 1 shows the top-level architecture of the system which consists of a reconfigurable switched capacitor DC-DC converter split in four interleaved modules for output voltage ripple reduction, pulse frequency modulation (PFM) logic, a clock generator,  gain selection block that includes programmable low duty cycle timers, and a voltage reference. The PFM modulation scheme is performed using a dynamic comparator whose output is fed into cascaded clock dividers, after which non-overlap clock generators to provide the multi-phase control signals. The SC converter gain setting is selected based on the ratio of the reference to the input voltage by using dynamic comparators and gain select decoder  to set the configuration of the switch matrix. The system was fabricated in 130-nm CMOS process and occupies an area of 600×610 μm² as shown in Figure 2.  The converter supports four conversion ratios (1/3-1/2-2/3-1) while supplying a wide output voltage range of 0.4V to 1.1V from 1.5V input and a load current of 20μA to 1mA. The system achieves a peak efficiency of 93% including the control overhead at load current of 500µA and output voltage of 0.96V while the SC DC-DC converter alone achieves a peak efficiency of 94%.



Figure 1: System top-level architecture



Figure 2: Chip micrograph.




A 90.6%, 11-MHz, 22-W LED Driver using GaN FETs and a Burst Mode Controller

• Authors: S. Bandyopadhyay, B. Neidorff, D. Freeman, A. P. Chandrakasan
• Sponsorship: MIT-MTL GaN Energy Initiative



Figure 1: Block diagram of LED driver.

With the advent of reliable, high-brightness and high-efficacy LEDs, the lighting industry is expected to see a significant growth in the near future. However, for LEDs to completely replace the traditional incandescent and CFL bulbs, the power converters within the LED drivers need more efficiency and further miniaturization. Superior figure of merit (R_ds,ONxQ_g) of gallium nitride (GaN) FETs over silicon FETs can enable both high-efficiency and  high-frequency operation, thereby making power converters smaller, more efficient, and more reliable. Using integrated controllers and drivers can reduce the number of components on the driver PCB, further miniaturizing the driver. This work focuses on demonstrating a small form factor, high-efficiency offline LED driver using GaN FETs with an integrated gate driver and controller circuit implemented on a 0.35-mm CMOS process with 3.3V/15V voltage handling capability. Figure 1 shows the architecture of the LED driver implemented. The driver achieves a peak efficiency of 90.6% and a peak power factor of 0.96. In order to operate the converter efficiently at high frequencies, a Quasi-Resonant topology is employed. The resonant circuit, formed by L_RESO and C_OUT,GaN, helps achieve Zero Voltage Switching (ZVS). An on-chip integrated burst-mode controller is implemented to control the LED current, provide power factor correction, and drive the gate of the GaN FET.