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A Monolithically-integrated Optical Carrier-injection Ring Modulator and All-digital Driver Circuit in Commercial 45-nm SOI

• Authors: B. R. Moss, C. Sun, M. Georgas, J. Shainline, J. S. Orcutt, J. C. Leu, M. Wade, H. Li, R. Ram, M. A. Popović, V. Stojanović
• Sponsorship: DARPA, NSF, SRC/FCRP IFC, Trusted Foundry, CICS, Natural Sciences and Engineering Research Council of Canada

A monolithically integrated photonic modulator and driver circuit is a key building block toward realizing a dense and energy-efficient communication fabric that can satisfy future bandwidth density demands in VLSI systems.

The optical modulator device is a resonant ring with rib waveguide carrier-injection phase shifters, identical to the one in^[1]. The DDR driver in Figure 1 is designed as an all-digital push-pull circuit with configurable drive strengths, sub-bit-time pre-emphasis^[2] and split supplies, operating over a range of drive current profiles required for a wide variety of optical devices. The split power supply and level-shift drivers allow exploration of the tradeoffs between energy-cost and extinction ratio. The highly configurable driver back-end controls four independent drive heads, each providing a configurable drive strength and specialized biasing regime. As illustrated in the Figure 1 inset, a combination of drive segments A and B provides the strongest drive generating the sub-bit current pre-emphasis needed for fast injection of carriers into the modulator on a “0” to “1” transition. Reduced strength segment B maintains the lower current levels necessary for keeping the carriers inside the modulator during a logic “1,” replacing carriers lost in recombination. On a “1” to “0” transition, segment D provides a fast reverse-bias period, enabling carrier discharge from the modulator. After the brief discharge period, the modulator is weakly forward-biased into the subthreshold through segment C, lowering the on-resistance of the modulator intrinsic region and allowing faster turn-on “0” to “1.”  The final drive heads and optical eye diagram are shown in Figure 2. In combination with the forward and reverse-bias sub-bit pre-emphasis, the weak subthreshold forward biasing speeds up the device an order of magnitude above its inherent bandwidth.

The modulator and its driver, operating at 2.5 Gb/s and 1.23 pJ/b with an extinction ratio of 3dB, demonstrate the fastest, most energy-efficient monolithically integrated driver/modulator in sub-100-nm CMOS technology to date.



Figure 1: Modulator and driver circuit fed by an on-chip 32-bit pseudo-random bit sequence generator.



Figure 2: Final driver segments and 2.5 Gb/s eye diagram at 1.23 pJ/b and extinction ratio of 3 dB. An off-chip tunable laser provides the incoming 1550-nm-band light.




1. J. Orcutt, B. Moss, C. Sun, J. Leu, M. Georgas, J. Shainline, E. Zgraggen, H. Li, J. Sun, M. Weaver, S. Urošević, M. Popović, R. J Ram, and V. Stojanović, “Open foundry platform for high-performance electronic-photonic integration,” Optics Express, vol. 20, no. 1, pp. 12222-12232, May 2012. [↩]
2. Q. Xu, S. Manipatruni, B. Schmidt, J. Shakya, and M. Lipson, “12.5 Gbit/s carrier-injection-based silicon micro-ring modulators,” Optics Express vol. 15, pp. 430-436, Jan. 2007. [↩]