All entries for luca daniel

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FastMarkov: A Markov–Chain-based Hierarchical Solver for Large-scale Capacitance Extraction

• Authors: Y. Zhao, T. Moselhy, R. Mathur, I. M. Elfadel, L. Daniel
• Sponsorship: SRC/FCRP IFC, AMD, Mentor Graphics

Standard full-chip capacitance extraction algorithms rely for computational efficiency on 2D scanning and table lookup algorithms. These algorithms trade off accuracy for computational efficiency and result in large error in the extracted capacitance of complex layouts. It is therefore desirable to use accurate field solvers for full-chip extraction, which in general can be divided into two types: discretization-based and discretization-free. Discretization-based methods include the finite difference methods, the finite element methods and the boundary element methods ^[1] . The most well-known discretization-free algorithm is the floating random walk method and its variants. It is widely accepted that discretization-based methods are very efficient for small and medium-size structures and that discretization-free methods are more efficient for very large structures. Recently, our group has proposed a Markov Chain-based hierarchical algorithm ^[2] combining the advantages of both discretization-based and discretization-free methods.



Figure 1: An example of a layout that can be analysed by our solver and containing 85 nets (represented by different colours) and 14 dielectric layers (removed from image for clarity). Image courtesy of Intel Corporation.

In this project we further refine our algorithm and implement it in C++ for very large-scale capacitance extraction. A layout is first partitioned into smaller blocks. The Markov Transition Matrix (MTM) for each block is computed, and then the capacitance of the full layout is extracted by simulating the Markov Chain with random walk methods. Our algorithm is efficient because the computation of an MTM is derived from the capacitance matrix associated with each block. Such a matrix is computed using the Finite Difference Method, which can handle highly inhomogeneous structures including different dielectrics and metal fills. In addition, our algorithm requires neither assembly nor solution of any linear system of equations at the level of the full layout. Consequently, the algorithm requires very modest computational time and memory to compute the capacitance matrix of the full- chip to field solver accuracy. In addition, our algorithm lends itself to efficient parallelization because both the computation of MTMs and the computation of random walks are embarrassingly parallelizable. The accuracy, efficiency, and almost linear scalability of the algorithm are being tested on FastMarkov – our C++ implemented, MPI-parallelized solver, which can handle large-scale, geometrically complex, industry provided examples (such as the one shown in Figure 1) in 45 minutes using 4-core parallelization. We have so far also verified that around 95% of computation time is spent on MTM computation, which can be reduced significantly by larger number parallelization.

1. K. Nabors and J. White, “Fastcap: a multipole accelerated 3-d capacitance extraction program,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 10, no. 11, pp. 1447-1459, Nov. 1991. [↩]
2. T. El-Moselhy, I. Elfadel, and L. Daniel, “A hierarchical floating random walk algorithm for fabric-aware 3d capacitance extraction,” in IEEE/ACM International Conference on Computer-Aided Design, 2009. [↩]

Compact Modeling of “Nonlinear” Analog Circuits using System Identification with Incremental Stability Certification

• Authors: Y.-C. Hsiao, A. Megretski, L. Daniel, Y.-C. Hsiao, A. Megretski, L. Daniel

During recent years, researchers in the Electronic Design Automation community have made great efforts to develop new techniques to automatically generate accurate compact models of “nonlinear”system blocks. The majority of the existing methods for creating stable reduced models of nonlinear systems, such as ^[1] , require knowledge of the internal structure of the system, as well as access to the exact model formulation for the original system.  Unfortunately, this information may not be easily available if a designer is using a commercial design tool or may not even exist if the system to be modeled is a physical fabricated device.

As an alternative approach to the standard nonlinear model reduction, we propose a system-identification procedure.  This procedure requires only data available from simulation or measurement of the original system, such as input-output training data pairs. However, simply fitting an arbitrary nonlinear model to the training data does not guarantee that the solution is a valid dynamic model. A valid dynamic model must be stable when evaluated in a time domain simulator. The challenge is to search for a nonlinear dynamic model that simultaneously satisfies the stability requirement and optimally matches the training data. We have managed to formulate such problem as a semi-definite convex optimization problem. The proposed optimization formulation, explained in detail in ^[2] as an efficient extension of ^[3] , allows us to specify completely the complexity of the identified reduced model through the choice of both model order and nonlinear function complexity.

Applications for the proposed modeling technique include analog circuit building blocks such as operational amplifiers and power amplifiers, and individual circuit elements such as transistors.  The resulting compact models may then be used in a higher-level design optimization process of a larger system.  One such example of an analog circuit block is the low-noise amplifier shown in Figure 1; it contains both nonlinear and parasitic elements.  For this example, input-output training data was generated from a commercial circuit-simulator and used to identify a compact nonlinear model. Figure 2 compares the output responses of the original system and the identified model.



Figure 1: Application example: Low-noise amplifier designed in CMOS technology.



Figure 2: Time domain outputs, over a small portion of the period, of the original LNA circuit from a commercial circuit simulator (solid line) and the stable nonlinear compact model identified by our procedure (dots) in response to an input signal different from the training signals.




1. B. Bond and L. Daniel, “Stabilizing schemes for piecewise-linear reduced order models via projection and weighting functions,” in Proc. of the IEEE Conference on Computer-Aided Design, San Jose, CA, Nov. 2007, pp. 860-867. [↩]
2. B. Bond, Z. Mahmood, Y. Li, R. Sredojevic, A. Megretski, V. Stojanovic, Y. Avniel, and L. Daniel, “Compact modeling of nonlinear analog circuits using system identification via demi-definite programming and incremental stability certification,” IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 29, issue 8, pp. 1149-1162, Aug. 2010. [↩]
3. A. Megretski, “Convex optimization in robust identification of nonlinear feedback,” in Proc. of the IEEE Conference on Decision and Control, Cancun, Mexico, Dec. 2008, pp. 1370-1374. [↩]

Modeling and Simulation of Blood Flow in Arterial Networks

• Authors: Y.-C. Hsiao, P. Triverio, T. Moselhy, J. White, L. Daniel
• Sponsorship: MIT-SkTech

Understanding certain medical conditions requires understanding specific aspects of the arterial blood flow. For instance, diagnosing atherosclerosis requires capturing detailed flow inside an arterial segment. Such study requires developing accurate solvers for the detailed equations describing both the blood flow and the elastic behavior of the arteries. At the other end of the spectrum, studying hypertension requires computing pressure and averaged flow over a larger arterial network. Such analysis requires developing compact computationally inexpensive models of complex segments of the arterial network. These models relate the pressure and average flow at the terminals of the arterial segments and must be easily interconnected to form complex and large arterial networks.

In this project we are developing a 2-D fluid-structure interaction solver to accurately simulate blood flow in arteries with bends and bifurcations. Such blood flow is mathematically modeled using the incompressible Navier-Stokes equations. The arterial wall is modeled using a linear elasticity model ^[1] . Our solver is based on an enhanced immersed boundary method (IBM) ^[2] . As a second step we are developing system identification techniques ^[3] to generate passive models for complex arterial segments such as large arteries, arterial bends, and bifurcations. We have validated our solver results versus reference results obtained from MERCK Research Laboratories for a straight vessel of length 10 cm and diameter 2 cm. Our results for pressure, flow, and radius variations are within 3% of those obtained from MERCK. Furthermore, we are validating our model results by cascading different models and comparing the results of the resulting network to those predicted by our solver. Our preliminary results for pressure and flow at the terminals of the models are within 10% of those obtained from the full simulator. In addition, with our models we reduce the computational time by more than 100,000 times.



Figure 1: We use i) our immersed boundary method for incompressible Navier-Stokes to extract a complete model ii) our system identification technique to construct a reduced model ^[3] . The lower part shows three major artery geometries we use for modeling a cardiovascular system.



Figure 2: A 20-cm artery is constructed by cascading two 10-cm artery models terminated with a matched load. The transient simulation results of the cascaded model are compared with those of a 20-cm artery solved by our immersed boundary method solver.




1. A. Quarteroni, M. Tuveri, and A. Veneziani “Computational vascular fluid dynamics: problems, models and methods,” Computing and Visualization in Science, vol. 2, no. 4, pp. 163-97, 2000. [↩]
2. C. Peskin and D. McQueen “A three-dimensional computational method for blood flow in the heart I. Immersed elastic fibers in a viscous incompressible fluid.” Journal of Computational Physics, vol. 81, issue 2, pp. 372-405, 1989. [↩]
3. B. Bond, T. Moselhy, and L. Daniel, “System identification techniques for modeling of the human arterial system,” in Proc. SIAM Conference on the Life Sciences, Pittsburgh, PA, July 2010, p. 12-15. (invited) [↩] [↩]

CAPLET: A Parallelized Boundary Element Method for VLSI Capacitance Extraction with Instantiable Basis Functions

• Authors: Y.-C. Hsiao, L. Daniel
• Sponsorship: SRC/FCRP IFC, SRC/FCRP GRC, Mentor Graphics, AMD, Freescale

Traditional interconnect capacitance extraction tools usually employ 2D scanning and table look-up methods for fast extraction.  For some structures, e.g., partially overlapping wires and comb capacitors, 2D scanning methods fail to generate accurate results (i.e. within 5% error), therefore using 3D field solvers becomes necessary despite the much slower performance. Accelerated field solvers have been proposed, such as FastCap ^[1] and Precorrected FFT ^[2] whose accelerations are effective only for large, semi-global structures of hundreds of wires. More importantly, ^[3] and ^[4] demonstrated that such two acceleration methods are not efficiently parallelizable, showing rapid degradation of parallel efficiency with the number of parallel nodes (40% to 60% at eight nodes).

We propose an efficiently parallelizable acceleration method for local, small-to-medium structures of tens of wires, targeting errors within 5%. We adopt our instantiable basis functions ^[5] as a compact charge distribution representation in the boundary element method. Our instantiable basis functions are usually 30 times more compact than traditional piecewise constant (PWC) basis functions ^{[1] [2] [3] [4]} in terms of required basis functions for the same capacitance accuracy (Figure 1). Such compactness not only accelerates the single-node execution (six times in Figure 2.a) but also greatly improves the parallel efficiency (Figure 2.b) by redistributing the computation between the hard parallelizable system solving part (from 90% of total execution to less than 5%) and the embarrassingly parallelizable matrix filling part (from 10% to more than 95%) ^[6] . We will release the complete tool set, from input gds2 layout files to capacitance matrices, in the public domain.



Figure 1: Charge distribution solutions represented by (a) 572 PWC basis functions and (b) 17 instantiable basis functions, respectively. Capacitance errors for both cases are 2% w.r.t. a reference value extracted by the standard BEM with fine PWC discretization.



Figure 2: (a) Industrial example. The algorithm is 6x faster than FASTCAP ^[1] for single-threaded execution at same accuracy (2.8% error w.r.t. a reference value). (b) 24×24 bus example. (c) Parallel efficiency vs. algorithms ^[3] and ^[4] .




1. K. Nabors and J. White, “Fast-Cap: A multipole-accelerated 3-D capacitance extraction program,” IEEE Transactions on Computer-Aided Design, vol. 10, no. 10, pp. 1447-1459, Nov. 1991. [↩] [↩] [↩]
2. J. R. Phillips and J. K. White, “A precorrected-FFT method for electrostatic analysis of complicated 3-D structures,” IEEE Transaction on Computer-Aided Design, vol. 16, no. 10, pp. 059-1072, Oct. 1997. [↩] [↩]
3. Y. Yuan and P. Banerjee, “A parallel implementation of a fast multipole-based 3-d capacitance extraction program on distributed memory multicomputers,” Journal of Parallel and Distributed Computing, vol. 61, no. 12, pp. 1751–1774, 2001. [↩] [↩] [↩]
4. N. R. Aluru, V. B. Nadkarni, and J. White, “A parallel precorrected FFT based capacitance extraction program for signal integrity analysis,” in Proceedings of the 33^rd Annual Design Automation Conference, 1996, pp. 363-366. [↩] [↩] [↩]
5. Y.-C. Hsiao, T. El-Moselhy, and L. Daniel, “Efficient capacitance solver for 3d interconnect based on template-instantiated basis functions,” IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, 2009, pp. 179–182. [↩]
6. Y.-C. Hsiao and L. Daniel, “A highly scalable parallel boundary element method for capacitance extraction,” Proceedings of the 48^th Annual Design Automation Conference, DAC 2011. [↩]

An Efficient Framework for Passive Compact Dynamical Modeling of Multiport Linear Systems

• Authors: Z. Mahmood, R. Suaya, L. Daniel
• Sponsorship: SRC/FCRP IFC, Mentor Graphics

Automatic generation of accurate, compact, and passive dynamical models for multiport linear structures such as interconnects is a crucial part of the overall design procedure for complex circuits. First, frequency response samples for multiport linear structures are collected from either an electromagnetic field solver or physical measurements. Second, a compact model is developed that can be incorporated into a circuit simulator for time-domain simulations of a larger system also containing nonlinear devices. For these compact models, even a small violation of any basic property of the structure, such as passivity, can cause large errors in the response of the overall system, and the results can become completely nonphysical. It is, therefore, essential to preserve basic system properties during the model identification. To model multiport structures from given frequency response samples, the approaches based on convex optimization ^[1] are very expensive and quickly exhaust available computational resources such as memory. These approaches can be used to model only structures having a much smaller number of ports. Other techniques identify a stable, but non-passive, model, and then perturb the model to make it passive ^[2] . However, such approaches suffer from limitations if the initial non-passive model has significant passivity violations.

In this work, we are developing an efficient modeling framework that will automatically generate accurate, compact, and passive dynamical models for multiport linear systems. Given measured transfer function samples, we identify a rational transfer function model that minimizes the mismatch at the given frequencies. These dynamical models can be interfaced with commercial circuit simulators for time-domain simulations of a larger interconnected system. To guarantee the stability of the overall simulation, we ensure the passivity of our generated models by enforcing semidefinite constraints during the fitting process as proposed in ^{[3] [4]} . Figure 1 shows the layout of coupled RF inductors, which is one of the structures we used for testing our algorithm.  Figure 2 compares the output of our identified model with the given data for a four-port structure. Furthermore, for the same model order, we get orders-of-magnitude improvement in terms of both speed and memory compared to ^[1] .



Figure 1: Layout of coupled RF inductors.



Figure 2: [4-port structure] Blue dots indicate the given Y11 frequency response samples. The red solid line is the Y11 from our identified model.




1. C. P. Coelho, J. R. Phillips, and L. M. Silveira, “A convex programming approach to positive real rational approximation,” in Proc. of the IEEE/ACM International Conference on Computer-Aided Design, San Jose, CA, Nov. 2001, pp. 245–251. [↩] [↩]
2. S. Grivet-Talocia, “Passivity enforcement via perturbation of Hamiltonian matrices,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, no. 91755–1769, Sept. 2004. [↩]
3. Z. Mahmood and L. Daniel, “Circuit synthesizable guaranteed passive modeling for multiport structures,” in Proc. of Behavioral Modeling and Simulation Conference (BMAS), Sept. 2010. [↩]
4. Z. Mahmood, R. Suaya and L. Daniel, “An efficient framework for passive compact dynamical modeling of multiport linear systems,” in Proc. of Design, Automation and Test in Europe (DATE), Mar. 2012. [↩]

Computational Electromagnetics Tools for High-Field Magnetic Resonance Imaging

• Authors: A. Hochman, J. Villena, Z. Mahmood, L. Wald, E. Adalsteinsson, J. White, L. Daniel
• Sponsorship: NIH, MIT-SkTech

Two recent advances in Magnetic Resonance Imaging (MRI) technology have resulted in a need for sophisticated computational electromagnetics (CEM) tools. The first is the availability of higher fields scans that can improve signal-to-noise ratio. The second is the availability of transmit-coil arrays, which can be used to minimize human-body heating by electric fields. Higher fields imply higher-frequency RF pulses, with wavelengths comparable to the human body dimensions, which complicates electromagnetic analysis. They also imply increased tissue heating, which limits the RF power used for imaging purposes. In the computational prototyping group, we are developing CEM techniques to address these new needs of the MRI community, working in close collaboration with the RLE MRI group and the Harvard Massachusetts General Hospital MRI group, with some specific targets.

First, we are developing fast methods for tuning and matching the transmitters to the human-body loaded MRI coils. We combined scattering-matrix formalism, a frequency-domain finite-elements method, and commercial RF optimization software to reduce this process from days to hours. Also we plan to apply integral-equation methods to reduce it to minutes. Second, we are developing integral methods to allow for efficiently optimizing the geometrical configuration of the transmit coils. This hybrid approach will combine pre-computed Green’s functions for a realistic human body model with method of moments to be able to rapidly assess different coil configurations for a typical body. To aid this assessment, we plan to leverage our work on parameterized model-order reduction, automatically generating models depending on relevant parametric quantities. We are also working on fast methods for computing the approximate solutions to the electromagnetic fields inside the human body, assuming a simplified 3-tissue model that can be obtained for each patient by a quick MRI scan. Finally, we are developing an automated procedure for designing robust decoupling networks for arbitrary MRI transmission coil arrays, based on automatic nonlinear least squares techniques to compute the input impedance matrix, in opposition to currently applied manual methods, limited to small number of channels. These decoupling networks reduce the input power required for the same local increase of body heat vs. excitation fidelity.



Figure 1: A scattering matrix formalism is used to generate a model for the transmit coils loaded by a human head. This model is then used in a commercial RF optimization package (RF Designer) to tune and match the coils to their drivers.



Figure 2: Electric fields generated by a 10A current source about 5 cm away from the chest, obtained by the commercial HFSS package. Similar calculations are performed for such sources at points around the body. These fields yield a numerically calculated Green’s function for the human body, which can then be used in an integral-equation method to rapidly assess different coil configurations.




Compact Parameterized Modeling of RF Nano-Electro-Mechanical (NEM) Resonators

• Authors: Z. Mahmood, R. Marathe, D. Weinstein, L. Daniel
• Sponsorship: SRC/FCRP IFC, NSF, SRC/FCRP IFC, NSF

Design and optimization of novel RF Nano-Electro-Mechanical (NEM) resonators such as Resonant Body Transistors (RBT) require modeling across multiple domains, including mechanical (distributed stress and elastic wave models), electrical (semiconductor devices and RF small signal models), and thermal. These domains are all cross-coupled in nonlinear ways and require lengthy finite element multi-physics analyses to solve. Due to the complexity of these structures embedded in the CMOS stack and sensed using active FETs, the day-long time scale of each finite element simulation prevents quick, intuitive parameterization of device design. A reduced model parameterized across all three domains is therefore necessary both for rapid prototyping and for device optimization.

In this work, we are developing an algorithm to automatically generate compact models for NEM resonators. Our compact models are suitable for AC, DC and RF operation of the device and allow the circuit designers to run circuit-level time-domain simulations using any commercial circuit simulator ^{[1] [2]} . The compact models are “parameterized,” so that the circuit designer will be able to instantiate instantaneously models within the circuit simulator for different values of the key device parameters.  Key resonator parameters included in the compact parameterized model are resonant frequency, quality factor, signal strength, isolation, presence of spurious modes, and operating temperature. Values for the model coefficients are calibrated using measurements from NEMS resonator devices. A critically important feature of our models is to guarantee that when circuit designers change arbitrarily values for the device parameters, the compact models will always preserve the physical properties of the original device and will never cause numerical instabilities and convergence issues when connected to other device models and circuits within the circuit simulator ^[3] . Figure 1 shows the layout of a Si-based NEMS-CMOS resonator. Numerical results show a great promise for our technique. We have achieved high quality fit to the measured data, as Figure 2 shows, which offered modeling challenges including the presence of noise and spurious resonant peaks.



Figure 1: Top and 3D views of a Si-based NEMS-CMOS.



Figure 2: Plotting measured data (blue noisy line) and the output from out model (red smooth line) for controlling voltage VA=0.3V.




1. Z. Mahmood and L. Daniel, “Circuit synthesizable guaranteed passive modeling for multiport structures,” in Proc. of Behavioral Modeling and Simulation Conference (BMAS), Sept. 2010. [↩]
2. Z. Mahmood, R. Suaya and L. Daniel, “An efficient framework for passive compact dynamical modeling of multiport linear systems,” in Proc. of Design, Automation and Test in Europe, (DATE), Mar. 2012. [↩]
3. Z. Mahmood and L. Daniel, “Guaranteed passive parameterized modeling of multiport passive circuit blocks,” in Proc. of TECHCON, Sept. 2011. [↩]

Luca Daniel

• Title: Emanuel E. Landsman Associate Professor
• Department: Department of Electrical Engineering and Computer Science

Collaborators

• R. Suaya, Mentor Graphics
• A. Elfadel, IBM T.J.Watson
• R. Mathur, Intel
• E. Demircan, Freescale
• S. Talocia, Politec. di Torino
• P. Triverio, Politec. di Torino
• M. Silveira, Univ. of Lisbon
• J. Villena, Univ. of Lisbon
• H. Fernandez, Univ. of Lisbon
• G. Antonini, Univ. dell’Aquila
• F. Ferranti, Ghent University
• A. Hochman, MIT EECS
• A. Megretski, MIT EECS
• D. Boning, MIT EECS
• J. White, MIT EECS
• K. Van Vliet, MIT Material Sci.
• R. Mahmoodian, MIT Material Sci.
• E. Adalsteinsson, MIT HST
• L. Wald, MGH Harvard

Graduate Students

• O. Mysore, MIT EECS
• Y. Hsiao, MIT EECS
• Z. Mahmood, MIT EECS
• Z. Zhang, MIT EECS
• Y. Zhao, MIT EECS

Postdoctoral Associates

• J. Villena, MIT
• A. Hochman, MIT

Research scientists

• T. Klemas, MIT and Lincoln Labs
• M. Kamon, MIT and Coventor

Support Staff

• C. Collins, Admin. Asst.

Publications

Z. Zhang, Q. Wang, N. Wong, L. Daniel, “A Moment-Matching Scheme for the Passivity-Preserving Model Order Reduction of Indefinite Descriptor Systems with Possible Polynomial Parts”, IEEE/ACM Asia Pacific Design Automation Conference, Yokohama, Japan, January 2011 (Best Paper Award Nomination).

L. Daniel, “Reduction Strategies for Linear and Nonlinear Electronic Systems”, Workshop on Reduction Strategies for the Simulation of Complex Problems, Milano, Italy, Jan 2011.

T. Moselhy, L. Daniel, “A Markov Chain Based Hierarchical Algorithm for Capacitance Extraction”, IEEE Trans. on Advanced Packaging, Special Issue Feb 2011. (Invited Paper)

T. Moselhy, L. Daniel, Invited Paper: “Variation-Aware Stochastic Extraction with Large Parameter Dimensionality: Review and Comparison of State of the Art Intrusive and Non-Intrusive Techniques”, International Symposium on Quality Electronic Design (IEQED), Santa Clara, CA March 2011.

Y. Hsiao, L. Daniel, “A Highly Scalable Parallel Boundary Element Method for Capacitance Extraction”, IEEE/ACM Design Automation Conf., San Diego, CA, June 2011.

L. Daniel, “New Advances and Future Directions in Model Reduction”, Workshop on Advances in Numerical Computation, Manchester UK, July 2011. (Invited Plenary Paper)

Z. Mahmood, L. Daniel, “Guaranteed Passive Parameterized Modeling of Multiport Passive Circuit Blocks”, Proc. of TECHCON11, Austin TX, Sept. 2011. (Best Paper & Presentation Award).

Z. Zhang, I. M. Elfadel, L. Daniel, “Model order reduction of fully parameterized systems by recursive least square optimization,” Int. Conf. Computer-Aided Design (ICCAD), pp. 523-530, San Jose, CA, Nov. 2011. (IEEE/ACM William J. McCalla ICCAD Best Paper Award Nomination)

R. Suaya, C. Xu, V. Kourkoulos, K. Banrejee, Z. Mahmood, L. Daniel, “Electromagnetic Characterization and Model Building for Passive Systems Including TSVs, for 3-D IC’s Application”, Proc. of IEEE Electrical Design of Advanced Packaging & Systems (EDAPS), Hangzhou, China, Dec. 2011.

T. El Moselhy, L. Daniel, “Stochastic Extraction for SoC and SiP Interconnect with Variability”, Proc. of IEEE Electrical Design of Advanced Packaging & Systems (EDAPS), Hangzhou, China, Dec. 2011. (Invited Paper)

Z. Mahmood, R. Suaya, L. Daniel, “An Efficient Framework for Passive Compact Dynamical Modeling of Multiport Linear Systems”, (Accepted) Proc. of Design Automation & Test in Europe (DATE), Dresden, Germany 2012.

Z. Zhang, M. Kamon and L. Daniel, “Continuation-based pull-in and lift-off simulation for micro-electro-mechanical system (MEMS) design”,  SRC TECHCON, Austin, TX, Sept. 2012.

Z. Mahmood, L. Daniel “Compact Parameterized Modeling of RF Nano-Electro-Mechanical (NEM) Resonators”, SRC TECHCON, Austin, TX, Sept. 2012.