Transistors with Steep Subthreshold Characteristics Based on Impact Ionization on Narrow Bandgap Semiconductors

Achieving a sharp subthreshold swing is crucial to enable the supply voltage scaling that is necessary for reducing power consumption in logic field-effect transistors. In this research, we are investigating a new approach to accomplish this goal based on impact ionization (II) on III-V narrow bandgap semiconductors.

In n-type partially-depleted floating body silicon-on-insulator transistors, a subthreshould swing less than the theoretical minimum value of 60 mV/decade at room temperature has been observed at relatively high drain bias [1] . This steep swing is attributed to holes generated due to II at the drain side that are swept back towards the source and pile up at the source end of the channel (under the gate). As a consequence of this piling-up, the body-source diode gets positively biased and more electrons are injected into the channel. The additional electrons, in turn, produce more holes. This positive feedback is the reason for a steep subthreshold swing. However, due to large bandgap and low II rate in silicon, a high drain bias is needed. This phenomenon is also associated with slow dynamics. In narrow bandgap materials, such as InAs where the ionization threshold is low and the ionization rate is high [2] , these difficulties could possibly be overcome.

Our current efforts in this area have been focused on the characterization of II in existing III-V FETs, in order to gain a comprehensive understanding of the physics. In our AlGaAs/In0.15Ga0.85As/AlGaAs high electron mobility transistors we have observed a classical signature of II. Our data shows a characteristic bell-shaped IG-VGS curve [3] and a negative temperature dependence. In Figure 1, IG/ID has an exponential dependence on (VDS-VDSAT)-1, which follows a classical model [4] . In a parallel effort, we are developing a simulation environment suitable for III-V transistors that can correctly capture impact ionization and its consequences. Preliminary simulated subthreshold characteristics are shown in Figure 2 and compared with measured characteristics.

Transistors with higher InAs composition will be investigated in the future in terms of dynamics, kink effect, gate current, etc. A more suitable simulation environment will also be pursued. Based on this understanding, we will propose and fabricate transistor structures that best exploit impact ionization to realize steep subthreshold characteristics.

  1. J. R. Davis, A. E. Glaccum, K. Reeson, and P. L. F. Hemment, “Improved subthreshold characteristics of n-channel SOI transistors,” IEEE Electron Device Letters, vol. Edl-7, no. 10, Oct. 1986. []
  2. J. Bude and K. Hess, “Thresholds of impact ionization in semiconductors,” Journal of Applied Physics, vol. 72, no. 8, July, 1992. []
  3. A. A. Moolji, S. R. Bahl, and J. A. del Alamo, “Impact ionization in InAlAs/InGaAs HFET’s,” IEEE Electron Device Letters, vol. 15, no. 8, Aug. 1994. []
  4. K. Hui, and C. Hu, “Impact ionization in GaAs MESFET’s,” IEEE Electron Device Letters, vol. 11, no. 3, Mar. 1990. []