All entries for Omair Saadat

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Low Temperature Gate Dielectric Deposition for Recessed AlGaN/GaN MIS-HEMTs

The use of gate dielectrics in AlGaN/GaN high electron mobility transistors (MIS-HEMTs) is attracting great interest for power applications since gate dielectrics improve the I_on/I_off ratio and reduce gate leakage in transistors. However, gate dielectrics prevent commonly used technologies like recessed gates. By using dielectrics deposited at low temperatures, we can design a self-aligned process in which the gate is lithographically patterned, the gate is recessed, and then the dielectric is deposited before the gate metal deposition. However, it has been reported that these dielectrics are of lower quality ^{[1] [2]} .  The purpose of this study is to investigate how dielectric material, deposition temperatures, and annealing conditions impact the quality of AlGaN/GaN MIS-HEMTs with low temperature gate dielectrics.

AlGaN/GaN/ MIS-HEMTs with HfO₂ and Al₂O₃ gate dielectrics were fabricated and studied with a reference Schottky gate transistor.  These dielectrics were deposited at temperatures ranging from 80 °C to 120 °C.  Following the gate metal deposition, different samples were annealed from 400C to 600C in either nitrogen or forming gas ambient.  The best HfO₂ transistors had a steeper subthreshold slope (71 mV/dec) than the best Al₂O₃ transistors (82 mV/dec) and the best Schottky gate transistors (142 mV/dec) as seen in Figure 1.   For all MIS-HEMTs, we found that annealing the transistors at 400 °C and increasing the deposition temperature improved the subthreshold slope the most.  In addition, we evaluated the I_on/I_off ratio of these transistors.  As seen in Figure 2, the devices with HfO₂ exhibited I_on/I_off ratios on the order of 10⁹, which was 4 orders higher than the best devices with Schottky gates.

To summarize, we show that by annealing low temperature gate oxides, low temperature MIS-HEMTs demonstrate performance better than Schottky gate transistors with respect to subthreshold slopes and I_on/I_off ratios.  These low temperature annealed oxides are very promising for combining fabrication technologies like submicron recessed gate transistors with gate dielectrics.



Figure 1: Correlation between subthreshold slope (S) and drain current in pinch-off for 120 °C HfO₂ devices. Note impact of annealing temperature on leakage current and subthreshold slope.



Figure 2: Impact of deposition temperature on the I_on/I_off ratio of transistors. Note that HfO₂ MIS-HEMTs have four orders-of- magnitude-higher I_on/I_off ratios than Schottky gate HEMTs with no dielectric.




1. M. D. Groner, F. H. Fabreguette, J. W. Elam, and S. M. George, “Low-temperature Al₂O₃ atomic layer deposition,” Chem Mater. vol. 16, no. 4, pp. 639-645, 2004. [↩]
2. D. J. Meyer, R. Bass, D. S. Katzer, D. A. Deen, S. C. Binari, K. M. Daniels, and C. R. Eddy Jr., “Self-aligned ALD AlO_x T-gate insulator for gate leakage current suppression in SiN_x-passivated AlGaN/GaN HEMTs,” Solid-State Electron., vol. 54, pp. 1098-1104, 2010. [↩]