Low Temperature Gate Dielectric Deposition for Recessed AlGaN/GaN MIS-HEMTs
- Category: Electronic Devices
- Tags: Omair Saadat, Tomas Palacios
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Download as PDFThe use of gate dielectrics in AlGaN/GaN high electron mobility transistors (MIS-HEMTs) is attracting great interest for power applications since gate dielectrics improve the Ion/Ioff ratio and reduce gate leakage in transistors. However, gate dielectrics prevent commonly used technologies like recessed gates. By using dielectrics deposited at low temperatures, we can design a self-aligned process in which the gate is lithographically patterned, the gate is recessed, and then the dielectric is deposited before the gate metal deposition. However, it has been reported that these dielectrics are of lower quality [1] [2] . The purpose of this study is to investigate how dielectric material, deposition temperatures, and annealing conditions impact the quality of AlGaN/GaN MIS-HEMTs with low temperature gate dielectrics.
AlGaN/GaN/ MIS-HEMTs with HfO2 and Al2O3 gate dielectrics were fabricated and studied with a reference Schottky gate transistor. These dielectrics were deposited at temperatures ranging from 80 °C to 120 °C. Following the gate metal deposition, different samples were annealed from 400C to 600C in either nitrogen or forming gas ambient. The best HfO2 transistors had a steeper subthreshold slope (71 mV/dec) than the best Al2O3 transistors (82 mV/dec) and the best Schottky gate transistors (142 mV/dec) as seen in Figure 1. For all MIS-HEMTs, we found that annealing the transistors at 400 °C and increasing the deposition temperature improved the subthreshold slope the most. In addition, we evaluated the Ion/Ioff ratio of these transistors. As seen in Figure 2, the devices with HfO2 exhibited Ion/Ioff ratios on the order of 109, which was 4 orders higher than the best devices with Schottky gates.
To summarize, we show that by annealing low temperature gate oxides, low temperature MIS-HEMTs demonstrate performance better than Schottky gate transistors with respect to subthreshold slopes and Ion/Ioff ratios. These low temperature annealed oxides are very promising for combining fabrication technologies like submicron recessed gate transistors with gate dielectrics.
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- Figure 1: Correlation between subthreshold slope (S) and drain current in pinch-off for 120 °C HfO2 devices. Note impact of annealing temperature on leakage current and subthreshold slope.
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- Figure 2: Impact of deposition temperature on the Ion/Ioff ratio of transistors. Note that HfO2 MIS-HEMTs have four orders-of- magnitude-higher Ion/Ioff ratios than Schottky gate HEMTs with no dielectric.
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