Compact Physical Modeling of Graphene Field Effect Transistors
- Category: Electronic Devices
- Tags: Dimitri Antoniadis, Han Wang, Jing Kong, Tomas Palacios
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Download as PDFGraphene is a two-dimensional (2D) material that has attracted great interest for electronic devices since the demonstration of field effect carrier modulation in 2004 [1] . Its high mobility and high saturation velocity make graphene a promising material for next generation of high-frequency devices [2] , and its 2D geometry also makes it highly compatible with existing fabrication technology in the semiconductor industry. Furthermore, the possibility of large-scale synthesis of graphene by chemical vapor deposition (CVD) and epitaxial growth [3] [4] [5] makes graphene integrated circuits a feasible reality in the near future. Hence, it is desirable to develop a compact physical model that can enable the use of computer-aided-design software to simulate future complex circuits. In this work, we develop a compact model for the current-voltage characteristics of graphene field effect transistors (GFETs), which is based on an extension of the “virtual-source” model previously proposed for Si MOSFETs [6] [7] and is valid for both saturation and non-saturation regions of device operation (Figure 1). This virtual source model provides a simple and intuitive understanding of carrier transport in GFETs, allowing extraction of the virtual source injection velocity vVS, a physical parameter with great technological significance for short-channel graphene transistors. With only a small set of fitting parameters, the model shows excellent agreement with experimental data (Figure 2). It is also shown that the extracted virtual source carrier injection velocity for graphene devices is much higher than in Si MOSFETs and state-of-the-art III-V HFETs with similar gate length, supporting the great potential of GFETs for high frequency applications. Future work includes extending the model for both small signal and large signal modeling of GFETs RF performance and implementation in Verilog to enable modeling of graphene circuits.
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- Figure 1: Schematic diagram of the cross-section of a GFET device. The virtual electron source (VES) point and the virtual hole source (VHS) point in the channel are defined for a GFET. The electrostatic potential along the channel and the position of VES and VHS are shown for a GFET operating in the three operating regions: I. Electron conduction region; II. Ambipolar region; III. Hole conduction region.
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- Figure 2: (a) Top-view of the three-dimensional plot of IDS vs. VTGS and VBGS at VDS=1.1 V. (b), (c) and (d) are cross-sections in (a) at the corresponding dotted lines. The model results are shown as solid lines; the experiment data is shown as dots. In (b), VBGS is kept constant at 0 V, and VTGS is swept from -1 V to 3 V. A family of curves is shown for VDS increasing from 0.35 V to 1.1 V in steps of 0.25 V. In (c), VTGS is kept constant at 0 V, and VBGS is swept from -50 V to 100 V. (d) VTGS is kept constant at 1.41 V, and VBGS is swept from -30 V to 40 V. A family of curves is shown for VDS, increasing from 0.35 V to 1.1 V in steps of 0.25 V.
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