Luca Daniel
Collaborators
- J. Dawson, MIT
- A. Elfadel, IBM T.J.Watson,
- A. Megretski, MIT
- V. Stojanovic, MIT
K. Sou, LTH Lund - R. Suaya, Mentor Graphics
- J. White, MIT
POSTDOCTORAL ASSOCIATES
- B. N. Bond, EECS
- T. A. El Moselhy, AERO/ASTRO
Graduate Students
- Y. Hsiao, Res. Asst., EECS
- E. Natarajan, Res. Asst., EECS
- Z. Mahmood, Res. Asst., EECS
- Y. Zhao, Res. Asst., EECS
- Z. Zhang, Res. Asst., EECS
underGraduate Students
- O. Mysore, Res. Asst., EECS
Support Staff
- C. Collins, Admin. Asst.
Publications
K. C. Sou, A. Megretski, L. Daniel, “A Quasi-Convex Optimization Approach to Parameterized Model Order Reduction”, IEEE Trans. on Computer-Aided Design of Integrated Circuits & Systems, vol. 27, no. 3, p. 456-469, March 2008.
T. Moselhy and L. Daniel, “Stochastic Integral Equation Solver for Efficient Variation Aware Interconnect Extraction”, IEEE/ ACM Design Automation Conf., Anaheim, CA, June 2008.
B. Bond and L. Daniel, “Guaranteed Stable Projection-Based Model Reduction for Indefinite and Unstable Linear Systems” IEEE/ACM Conf. on Computer-Aided Design, San Jose, p. 728-35, November 2008. (IEEE/ACM William J. McCalla ICCAD Best Paper Award).
T. Moselhy, I. M. Elfadel, and L. Daniel, “A Capacitance Solver for Incremental Variation-Aware Extraction”, Proceedings of the IEEE Conference on Computer-Aided Design, San Jose, p. 662-9, Nov 2008.
K. C. Sou, A. Megretski, L. Daniel, “Convex Relaxation Approach to the Identification of the Wiener-Hammerstein Model”, 47th IEEE Conference on Decision and Control, Cancun Mexico, p. 1375-82, Dec 2008.
Y. C. Hsiao, T. Moselhy, L. Daniel, “Efficient Capacitance Solver for 3D Interconnect Based on Template-Instantiated Basis Functions,” IEEE 18th Conf. on Electrical Performance of Electronic Packaging and Systems, Portland, Oregon, Oct 2009.
B. N. Bond, L. Daniel, “Stable Macromodels for Nonlinear Descriptor Systems through Piecewise-Linear Approximation and Projection”, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, p. 1467-1480, Oct 2009.
T. Moselhy, I. M. Elfadel, L. Daniel, “A Hierarchical Floating Random Walk Algorithm for Fabric-Aware 3D Capacitance Extraction,” IEEE/ACM International Conference on Computer-Aided Design, San Jose, CA, Nov 2009. (Best Paper Award Nomination)
Z. Mahmood, T.Moselhy, L. Daniel, “Passive Reduced Order Modeling of Multiport Interconnects via Semidefinite Programming”, IEEE Conf. on Design Automation & Test in Europe, March 2010.
T. Moselhy, L. Daniel, “Variation-Aware Interconnect Extraction using Statistical Moment Preserving Model Order Reduction,” IEEE Conf. on Design Automation and Test in Europe (DATE), March 2010. (Best Paper Award Nomination).
Y. C. Hsiao, T. Moselhy, L. Daniel, “FastCaplet: A Template-Based Capacitance Field Solver for 3D VLSI Interconnect,” 28th Progress in Electromagnetic Research Symposium, Cambridge, July 2010.
T. Moselhy, L. Daniel “Electromagnetic Simulation for Variation-Aware Interconnect Parasitic Extraction,” 28th Progress In Electromagnetics Research Symposium, Cambridge, MA, July 2010.
T. Moselhy, B. Bond, J. Lee, J. White, L. Daniel, “Stabilized Immerse Boundary Method for the Simulation of the Human Arterial System,” SIAM Conference on the Life Sciences, Pittsburgh, PA, July 2010. (Invited Paper)
B. Bond, T. Moselhy, L. Daniel, “System Identification Techniques for Modeling of the Human Arterial System,” SIAM Conference on the Life Sciences, Pittsburgh, PA, July 2010. (Invited Paper)
B. Bond, L. Daniel, “Model Order Reduction for Analog Integrated Circuits”, IEEE/ACM Design Automation Conference, Anaheim, CA, June 2010. (Invited Paper)
T. Moselhy, L. Daniel, “Stochastic Dominant Singular Vectors Method for Variation-Aware Extraction,” IEEE/ACM Design Automation Conf., Anaheim, CA, June 2010.
T. Moselhy, L. Daniel, “A Markov Chain Based Hierarchical Algorithm for Capacitance Extraction”, IEEE Trans. on Advanced Packaging, Special Issue 2010. (Invited Paper)
B. Bond, Z. Mahmood, R. Sredojevic, Y. Li, A. Megretski, V. Stojanovic, Y. Avniel, L. Daniel, “Compact Stable Modeling of Nonlinear Analog Circuits using System Identification via Semi-Definite Programming and Robustness Certification,” IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, to Appear 2010.