Judy L. Hoyt
Collaborators
- Dimitri Antoniadis, EECS
- Karl Berggren, EECS
- Franz Kartner, EECS
- Rajeev Ram, EECS
- Michael Canonico, ASU
- Ted Lyszczarz, MIT Lincoln Labs
- Jung Yoon, MIT Lincoln Labs
Graduate Students
- Nicole DiLello, EECS
- Leonardo Gomez, EECS
- Pouya Hashemi, EECS
- Meekyung Kim, DMSE
- Jamie Teherani, EECS
RESEARCH STAFF
- Gary Riggott, Research Specialist
- Hyung-Seok Lee, Postdoctoral Scholar
Support Staff
- Whitney Rokui, Administrative Assistant II
Publications
P. Hashemi, M. Kim, J. Hennessy, L. Gomez, D.A. Antoniadis and J.L. Hoyt, “Width-dependent hole mobility in top-down fabricated Si-core/Ge-shell nanowire MOSFETs”, Appl. Phys. Lett. 96 (6), p. 063109, Feb. 2010.
L. Gomez, P. Hashemi, and J.L. Hoyt, “Enhanced Hole Transport in Short-Channel Strained-SiGe p-MOSFETs,” IEEE Transactions on Electron Devices vol.56, no.11, pp.2644-2651, Nov. 2009.
O.M. Nayfeh, J.L. Hoyt and D.A. Antoniadis, “Strained Si1-xGex/Si Band-to-Band Tunneling Transistors: Impact of Tunnel-Junction Germanium Composition and Doping Concentration on Switching Behavior,” IEEE Transactions on Electron Devices, vol. 56, no. 10, pp. 2264-2669, Oct. 2009.
P. Hashemi, L. Gomez, and J.L. Hoyt, “Gate-All-Around N-MOSFETs with Uniaxial Tensile Strain-Induced Performance Enhancement Scalable to Sub-10-nm Nanowire Diameter,” IEEE Electron Device Letters, Vol. 30, No. 4, pp. 401-403, April 2009.
C.W. Holzwarth, R. Amatya, M. Araghchini, J. Birge, H. Byun, J. Chen, M. Dahlem, N.A. DiLello, F. Gan, J.L. Hoyt, E.P. Ippen, F.X. Kartner, A. Khilo, J. Kim, A. Motamedi, J.S. Orcutt, M. Park, M. Perrott, M. Popovic, R.J. Ram, H.I. Smith, G.R. Zhou, S.J. Spector, T. Lyszczarz, M.W. Geis, D.M. Lennon, J.U. Yoon, M. Grein, R.T. Schulein, S. Frolov, A. Hanjani, J. Shmulovich, “High speed analog-to-digital conversion with silicon photonics,” Proceedings of the SPIE v 7220, p 72200B (15 pp.), 2009.
P. Hashemi, L. Gomez, M. Canonico, and J.L. Hoyt, “Electron Transport in Gate-All-Around Uniaxial Tensile Strained-Si Nanowire n-MOSFETs”, IEEE IEDM, Dec., 2008, pp.865-868.
C. Ni Chleirigh, N.D. Theodore, H. Fukuyama, S. Mure, H.-U. Ehrke, A. Domenicucci, and J. L. Hoyt, “Thickness Dependence of Hole Mobility in Ultrathin SiGe-Channel p-MOSFETs,” IEEE Trans. Electron Devices, Volume 55, Issue 10, Oct. 2008, pp. 2687 – 2694.
L. Gomez, P. Hashemi, and J.L. Hoyt, “Hole Velocity Enhancement in Sub-100nm Gate Length Strained-SiGe Channel p-MOSFETs on Insulator,” IEEE SOI Conference, New Paltz, NY, USA, October 2008.
P. Hashemi, M. Canonico, J.K.W. Yang, L. Gomez, K.K. Berggren, and J. L. Hoyt, “Fabrication and Characterization of Suspended Uniaxial Tensile Strained-Si Nanowires for Gate-All-Around n-MOSFETs,” ECS (Electrochemical Society) Transactions, Vol. 16, No. 10, p.p. 57-68, October 2008.
M. Kim, O. Olubuyide, J. Yoon, and J. Hoyt, “Selective Epitaxial Growth of Ge-on-Si for Photodiode Applications,” ECS (Electrochemical Society) Transactions, Vol. 16, No. 10, pp. 837-847, October 2008.
J.L. Hoyt, P. Hashemi, and L. Gomez, “Prospects for Top-Down Fabricated Uniaxial Strained Nanowire MOSFETs, ” in ECS Transactions , Vol. 16, No. 10, p.p. 731-734, October 2008.
O.M. Nayfeh, C. Ni Chleirigh, J. Hennessy, L. Gomez, J.L. Hoyt and D.A. Antoniadis, “Design of tunneling field-effect transistors using strained-silicon/strained-germanium type-II staggered heterojunctions,” IEEE Electron Device Letters, v 29, n 9, Sept. 2008, p 1074-7.
O.M. Nayfeh, C. Ni Chleirigh, J.L. Hoyt and D.A. Antoniadis, “Measurement of enhanced gate-controlled band-to-band tunneling in highly strained silicon-germanium diodes,” IEEE Electron Device Letters, v 29, n 5, May 2008, p 468-70.
C. Ni Chleirigh, XiaoRu Wang, G. Rimple, Yun Wang, N.D. Theodore, M. Canonico, and J.L. Hoyt, “Super critical thickness SiGe-channel heterostructure p-type metal-oxide-semiconductor field-effect transistors using laser spike annealing,” Journal of Applied Physics, v 103, n 10, 15 May 2008, p 104501-1-4.
P. Hashemi, L. Gomez, M. Canonico, and J.L. Hoyt “Performance Enhancement in Uniaxially Tensile Strained-Si Gate-All-Around Nanowire n-MOSFETs”, presented at IEEE Device Research Conference (DRC 2008), Santa Barbara, CA, USA, p. 185, June 2008.
L. Gomez, M. Canonico, M.K. Kim, P. Hashemi , and J.L. Hoyt, “Fabrication of Strained-Si/Strained-Ge Heterostructures on Insulator,” Journal of Electronic Materials, Vol. 37 (3), pp. 240-244, March 2008.