Duane S. Boning

Collaborators

  • Y.-C. Lam, NTU, Singapore
  • A. Philipossian, Univ. of Arizona
  • S.F. Yoon, NTU, Singapore

Graduate Students

  • K. Balakrishnan, Res. Asst., EECS
  • A. Chang, Res. Asst., EECS
  • J. Diaz, Res. Asst.,
  • N. Drego, Res. Asst., EECS
  • W. Fan, Res. Asst., EECS
  • C. GoGwilt, Res. Asst., EECS
  • J. Lee, Res. Asst., EECS
  • J. Johnson, Res. Asst., EECS
  • L. Yu, Res. Asst., EECS

PostDoctoral Fellow

  • H. Taylor, Postdoctoral Fellow

Support Staff

  • M. Whiting, Admin. Asst. II

Publications

N. Drego, A. Chandrakasasan, D. Boning, “Lack of Spatial Correlation in MOSFET Threshold Voltage Variation and Implications for Voltage Scaling,” IEEE Transactions on Semiconductor Manufacturing, vol. 22, no. 2, pp. 245-255, May 2009.

H. Taylor, Y.-C. Lam, and D. Boning, “A computationally simple method for simulating the micro-embossing of thermoplastic layers,” Journal Micromechanics and Microengineering, vol. 19, no. 7, p. 075007 (16 pp), July 2009.

Z. Xu, H. K. Taylor, D. S. Boning, S. F. Yoon, and K. Youcef-Toumi, “Large-area and high-resolution distortion measurement based on moiré fringe method for hot embossing process,” Optics Express, vol. 17, no. 21, pp. 18394-18407, Oct. 2009.

N. Drego, A. Chandrakasan, and D. Boning, “All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits,” IEEE Journal Solid-State Circuits, vol. 45, no. 3, pp. 640-651, March 2010.

W. Fan, D. Boning, L. Charns, H. Miyauchi, H. Tano, and S. Tsuji, “Study on Hardness and Conditioning Effects of CMP Pad Based on Physical Die-level CMP Model,” Journal of the Electrochemical Society, pp. H526-H533, vol. 157, no. 5, May 2010.

H. Taylor, M. Hale, Y. C. Lam, and D. Boning, “A method for the accelerated simulation of micro-embossed topographies in thermoplastic polymers,” Journal of Micromechanics and Microengineering, vol. 20, no. 6, p. 065001:1-11, June 2010.

D. Boning, J. Johnson, H. McCulloh, and N. Patel, “The Evolution of Pattern-Density in CMP Modeling,” Symposium on Chemical-Mechanical Planarization, Materials Research Society Spring Meeting, San Francisco, CA, April 2009.

K. Balakrishnan and D. Boning, “Measurement and Analysis of Contact Plug Resistance Variability,” Custom Integrated Circuits Conference (CICC), pp. 415-422, San Jose, CA, Oct. 2009.

H. Taylor and D. Boning, “Fast simulation of pattern dependencies in thermal nanoimprint lithography,” International Conference on Nanoimprint and Nanoprint Technology (NNT), paper C14 (2 pages), San Jose, CA, Nov. 2009.

H. Taylor and D. Boning, “Towards nanoimprint lithography-aware layout design checking,” SPIE Advanced Lithography, Design for Manufacturability through Design-Process Integration IV, Proc. of SPIE Vol. 7641, paper 7641-29 (12 pages), San Jose, CA, Feb. 2010.

D. Boning, “CMP Mechanisms and Models: Progress and Challenges,” Keynote, Symposium V: CMP and Post-CMP Cleaning, China Semiconductor Technology International Conference (CSTIC), Shanghai, China, March 18-19, 2010.

D. Boning and J. M. Johnson, “Slurry Particle Agglomeration Model for Chemical Mechanical Planarization (CMP),” paper E4.3, Chemical-Mechanical Planarization Symposium, Materials Research Society Spring Meeting, San Francisco, April 2010.

D. Boning and W. Fan, “Characterization and Modeling of Pad Asperity Response in CMP,” paper E5.4, Chemical-Mechanical Planarization Symposium, Materials Research Society  Spring Meeting, San Francisco, April 2010.

B.W. Anthony, D.S.  Boning, S. F. Yoon, K. Youcef-Toumi, Z. P. Fang, D. Ljubicic, S. Li, I. Reading, V. Shilpiekandula, H. K. Taylor, Z. Xu, and J. Zhao, “Metrology and Process Control for Manufacturing of Microfluidic Devices,” Symposium on Manufacturing of Microfluidic Devices, NTU, Singapore, January 21, 2010.

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