Tomás Palacios

  • Title: Emmanuel E. Landsman CD Associate Professor
  • Department: Department of Electrical Engineering and Computer Science

Collaborators

  • D. Antoniadis, MIT
  • J. del Alamo, MIT
  • P. Jarillo-Herrero, MIT
  • D. Jena, University of Notre Dame
  • J. Kong, MIT
  • U. K. Mishra, University of California – Santa Barbara
  • E. Monroy, CEA-Grenoble, France
  • E. Munoz, ETSIT-UPM, Spain
  • D. Perreault, MIT
  • C. Thompson, MIT
  • H. Xing, University of Notre Dame

Postdoctoral Associates

  • M. Azize, France
  • T. Fujishima, Japan
  • T. Imada, Japan
  • H.-S. Lee, South Korea
  • Z. Liu, Singapore
  • E. Matioli, Brazil

Graduate Students

  • F. Gao, Research Assistant
  • S. Ha, Research Assistant
  • A. Hsu, Research Assistant
  • D. S. Lee, Research Assistant
  • S. Joglekar, Research Assistant
  • B. Lu, Research Assistant
  • B. Mailly, Research Assistant
  • M. Medlock, Research Assistant
  • D. Piedra, Research Assistant
  • O. I. Saadat, Research Assistant
  • M. Sun, Research Assistant
  • H. Wang, Research Assistant
  • L. Yu, Research Assistant
  • X. Zhang, Research Assistant
  • Y. Zhang, Research Assistant

Undergraduate Students

  • B. Jain
  • R. Luo

Support Staff

  • J. Baylon, Admin Assistant II

Publications

Wang, H., A. Hsu, J. Kong, D. Antoniadis, and T. Palacios, “A Compact Virtual Source Current-Voltage Model for Top and Back-Gated Graphene Field Effect Transistors,” IEEE Trans. Of Electron Dev., vol. 58 (5), pp. 1523-1533, 11 pages, May 2011.

Lee, H.-S., D. S. Lee, and T. Palacios, “AlGaN/GaN High Electron Mobility Transistors Fabricated Through a Au-free Technology,” Electron Dev. Letts., vol. 32 (5), pp. 623-625, May 2011.

Ryu, K. K., J. Roberts, E. Piner, and T. Palacios, “Thin-body N-face GaN Transistor Fabricated by Direct Wafer Bonding,” Electron Dev. Letts., vol. 32 (7), pp. 895-897, July 2011.

Hsu, A., H. Wang, K. K. Kim, J. Kong, and T. Palacios, “High Frequency Performance of Graphene Transistors Grown by Chemical Vapor Deposition for Mixed Signal Applications,” Jap. J. of Appl. Phys., vol. 50(7), pp. 070114, 4 pages, July 2011.

Hsu, A., H. Wang, K. K. Kim, J. Kong, and T. Palacios, “Impact of Graphene Interface Quality on Contact Resistances and RF Device Performance,” Electron Device Letters, vol. 32(8), pp. 1008-1010, 3 pages, Aug. 2011.

Xiong C., W. Pernice, K. K. Ryu, C. Schuck, K. Y. Fong, T. Palacios, and H. X. Tang, “Integrated GaN photonic circuits on silicon (100) for second harmonic generation,” Optics Express, vol. 19 (11), pp. 10462-10470, 9 pages, 2011

Wang, H., T. Taychatanapat, A. Hsu, P. Jarillo-Herrero, and T. Palacios, “BN/Graphene/BN Transistors for RF Applications,” Electron Device Letters, vol. 32(9), pp. 1209-1211, 3 pages, Sept. 2011.

Lee, D. S., and T. Palacios, “500 GHz transistors based on GaN… when and how?,” Compound Semiconductor Magazine,pp.33-35, August/September 2011. (Invited).

Palacios, T., “Graphene Electronics: Thinking Outside the Si Box,” Nature Nanotechnology, vol. 6, pp. 464-465, 2 pages, 2011. (Invited).

Lee, D. S., X. Gao, S. Gao, D. Kopp, P. Fay, and T. Palacios, “300-GHz InAlN/GaN HEMTs With InGaN Back-Barrier,” IEEE Electron Dev. Letts.,vol. 32(11), pp 1525-1527, Nov. 2011.

Lu, B., T. Palacios, D. Risbud, S. Bahl, and D. I. Anderson, “Extraction of Dynamic On-Resistance in GaN Transistors under Soft- and Hard-switching Conditions,” Compound Semiconductors IC Symposium, Hawaii’s Big Island, HW, 4 pages, October 16-19, 2011. (Oral Presentation).

Lee, D. S., B. Lu, M. Azize, X. Gao, S. Guo, D. Kopp, P. Fay, and T. Palacios, “Impact of GaN Channel Scaling in InAlN/GaN HEMTs,” International Electron Device Meeting, Washington DC, December 5-7, 2011. (Oral Presentation).

Azize, M., O. Saadat, A. Hsu, M. Smith, S. Guo, S. Gradecak, and T. Palacios, “High Electron Mobility Transistors Based on InAlN/GaN Nanoribbons,” Electron Device Letters, vol. 32(12) pp. 1680-1682, Dec. 2011

Hoke, W. E., R. V. Chelakara, J. P. Bettencourt, T. E. Kazior, J. R. LaRoche, T. D. Kennedy, J. J. Mosca, A. Torabi, A. J. Kerr, H.-S. Lee, and T. Palacios, “Monolithic Integration of Silicon CMOS and GaN Transistors in a Current Mirror Circuit,” submitted to J. of Vac. Science and Tech. B, vol. 30(2) pp. 1-6, December 2011.

Palacios, T., “The coming of age of nanowire electronics,” Nature, vol. 481, pp 152-153, Jan 2012 (Invited).

Lee, H. S., K. Ryu, M. Sun, and T. Palacios, “Wafer-level Heterogeneous Integration of GaN HEMTs and Si (100) MOSFETs,” IEEE Electron Dev. Letts.,vol. 33(2), pp 200-202, Feb. 2012.

Lu, B., E. Matioli, and T. Palacios, “Tri-Gate Normally-off GaN Power MISFET,IEEE Electron Dev. Letts.,vol. 33(3), pp 360-366, March 2012.

Faculty & Topics