MOS Capacitance-Voltage Method for InAs/GaSb Band Alignment Extraction
- Category: Electronic Devices
- Tags: dimitri antoniadis, james teherani, judy l. hoyt
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Download as PDFSignificant reduction in processor power is needed in order to sustain future data center growth and extend battery life of mobile devices. To this end, we are investigating tunneling field-effect transistors (TFETs) [1] as a new type of switch that could potentially provide a subthreshold swing (SS) lower than 60 mV/decade at room temperature, which would enable low power, energy efficient devices.
The structure and energy band diagram of an InAs/GaSb TFET are shown in Figure 1a and 1b, respectively. The TFET switches by modulating the electron tunneling current that flows from the GaSb valence band to the InAs conduction band through the application of a gate voltage that bends the bands. Quantum mechanical tunneling depends strongly on the effective band gap, EG,eff, the energy difference between the InAs conduction band and the GaSb valence band at the InAs/GaSb interface, as indicated in Figure 1b. Since tunneling current is exponentially dependent on the effective band gap, characterizing the band alignment of the InAs/GaSb heterojunction is critical for optimal device design.
Figure 2 shows a simulated quasi-static capacitance-voltage curve of an ideal InAs/GaSb MOS-capacitor. Structure and material parameters (such as band alignment of the InAs/GaSb heterojunction) that affect specific regions of the capacitance-voltage curve are labeled in the figure. These parameters can be extracted by fitting quasi-static quantum mechanical simulations to experimentally measured capacitance-voltage data using a technique that was used successfully in the study of band alignments in the Si-Ge material system [2] . Additionally, a new technique has also been developed to properly model the density of interface traps (Dit) at the dielectric/InAs interface.
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- Figure 1: (a) TFET device structure. (b) Energy band diagram along the line indicated in (a). Electrons from the GaSb valence band tunnel into the InAs conduction band when a sufficient positive gate bias is applied. EG,eff is the difference in energy between the InAs conduction band and the GaSb valence band.
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- Figure 2: Simulated quasi-static capacitance-voltage curve of an ideal InAs/GaSb heterostructure MOS-capacitor with no interface traps. The peak capacitance at negative voltage provides the equivalent oxide thickness (EOT), and is related to the width between the accumulation and inversion regimes of the CV. As EG,eff becomes smaller, so too does the width between the regimes. The detailed shape of the capacitance-voltage curve for positive voltages is due to electron sub-bands in the InAs layer and will likely be obscured by Dit in the experimental measurement.
- A. C. Seabaugh and Qin Zhang, “Low-Voltage Tunnel Transistors for Beyond CMOS Logic,” Proceedings of the IEEE, vol. 98, no. 12, pp. 2095–2110, 2010. [↩]
- S. P. Voinigescu, K. Iniewski, R. Lisak, C. A. T. Salama, J.-P. Noél, and D. C. Houghton, “New technique for the characterization of Si/SiGe layers using heterostructure MOS capacitors,” Solid-State Electronics, vol. 37, no. 8, pp. 1491–1501, Aug. 1994. [↩]