The New Era of Scaling in an SOC World

Mark Bohr, Intel Corporation

Abstract

Traditional MOSFET scaling served our industry well for about 30 years until limits posed by leakage and chip power were reached earlier in this decade. To overcome these limits we have entered a new era of scaling where innovations in device materials and transistor structure are just as important as simple dimensional scaling for achieving continued improvements in density and performance. Examples of these types of innovations start with the introduction of copper and low-k interconnects, followed by strained silicon transistors, and more recently high-k + metal gate transistors. Modern microprocessors have successfully incorporated a larger number and wider range of high performance analog and adaptive circuits to overcome device variability limitations, to more finely tune performance and power characteristics, and to add more functionality to chips. Intel’s 45 nm and 32 nm logic technologies will be described along with some of the adaptive circuit techniques employed on the 45 nm Nehalem microprocessor. The talk will describe some of the research options being pursued for 22 nm and beyond along with a vision of the types of technologies and product requirements needed over the next 10 years. The goal of these research efforts will be increasingly focused on System-On-Chip products that integrate a diverse set of device types to meet a broader range of product functions and applications.

Biography

Mark Bohr is an Intel Senior Fellow and Director of Process Architecture and Integration. He joined Intel in 1978 and has been responsible for process integration and device design on a variety of process technologies for memory and microprocessor products. He is currently directing development activities for Intel's 22 nm logic technology. Bohr received the M.S. degree in electrical engineering in 1978 from the University of Illinois, Urbana-Champaign. He is a Fellow of the Institute of Electrical and Electronics Engineers, was the recipient of the 2003 IEEE Andrew S. Grove award, and is a member of the National Academy of Engineering.