{"id":800,"date":"2013-06-27T19:48:05","date_gmt":"2013-06-27T19:48:05","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2013\/?p=800"},"modified":"2013-08-13T21:46:46","modified_gmt":"2013-08-13T21:46:46","slug":"a-monolithically-integrated-optical-carrier-injection-ring-modulator-and-all-digital-driver-circuit-in-commercial-45-nm-soi","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2013\/a-monolithically-integrated-optical-carrier-injection-ring-modulator-and-all-digital-driver-circuit-in-commercial-45-nm-soi\/","title":{"rendered":"A Monolithically-integrated Optical Carrier-injection Ring Modulator and All-digital Driver Circuit in Commercial 45-nm SOI"},"content":{"rendered":"

A monolithically integrated photonic modulator and driver circuit is a key building block toward realizing a dense and energy-efficient communication fabric that can satisfy future bandwidth density demands in VLSI systems.<\/p>\n

The optical modulator device is a resonant ring with rib waveguide carrier-injection phase shifters, identical to the one in[1<\/a>]<\/sup>. The DDR driver in Figure 1 is designed as an all-digital push-pull circuit with configurable drive strengths, sub-bit-time pre-emphasis[2<\/a>]<\/sup> and split supplies, operating over a range of drive current profiles required for a wide variety of optical devices. The split power supply and level-shift drivers allow exploration of the tradeoffs between energy-cost and extinction ratio. The highly configurable driver back-end controls four independent drive heads, each providing a configurable drive strength and specialized biasing regime. As illustrated in the Figure 1 inset, a combination of drive segments A and B provides the strongest drive generating the sub-bit current pre-emphasis needed for fast injection of carriers into the modulator on a \u201c0\u201d to \u201c1\u201d transition. Reduced strength segment B maintains the lower current levels necessary for keeping the carriers inside the modulator during a logic \u201c1,\u201d replacing carriers lost in recombination. On a \u201c1\u201d to \u201c0\u201d transition, segment D provides a fast reverse-bias period, enabling carrier discharge from the modulator. After the brief discharge period, the modulator is weakly forward-biased into the subthreshold through segment C, lowering the on-resistance of the modulator intrinsic region and allowing faster turn-on \u201c0\u201d to \u201c1.\u201d\u00a0 The final drive heads and optical eye diagram are shown in Figure 2. In combination with the forward and reverse-bias sub-bit pre-emphasis, the weak subthreshold forward biasing speeds up the device an order of magnitude above its inherent bandwidth.<\/p>\n

The modulator and its driver, operating at 2.5 Gb\/s and 1.23 pJ\/b with an extinction ratio of 3dB, demonstrate the fastest, most energy-efficient monolithically integrated driver\/modulator in sub-100-nm CMOS technology to date.<\/p>\n\n\t\t