{"id":778,"date":"2013-06-27T20:00:57","date_gmt":"2013-06-27T20:00:57","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2013\/?p=778"},"modified":"2013-08-13T20:27:45","modified_gmt":"2013-08-13T20:27:45","slug":"building-compressed-sensing-systems","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2013\/building-compressed-sensing-systems\/","title":{"rendered":"Building Compressed Sensing Systems"},"content":{"rendered":"

Compressed sensing (CS) is a sub-Nyquist sampling technique[1<\/a>]<\/sup> with under-explored implementation potential. In this multi-disciplinary project, we analyze CS circuit architectures from a hardware implementation perspective[2<\/a>]<\/sup>,[3<\/a>]<\/sup>, develop and apply end-to-end evaluation methodologies from a system perspective[4<\/a>]<\/sup>,[5<\/a>]<\/sup>, and support experiments by analyses from a theoretical perspective[6<\/a>]<\/sup>. We have considered the practical aspects of CS applied to both wireless sensors and Analog Information Converters (AICs).\u00a0 For the former, we showed that a digital CS-based sensor system is efficient and robust. By data compression alone, CS enables over 10X energy reduction in transmission energy; see Figure 1. CS is robust to channel errors, and amenable to simple schemes to enable 4X energy reduction[4<\/a>]<\/sup>. For the latter (AICs), we evaluated the ability of CS to overcome resolution\/performance limitations of Nyquist-rate high-speed sampling (limited by jitter, aperture and other circuit impairments). We find AICs have no performance advantage over high-speed ADCs. In standard architectures, signal encoding is realized with a mixer-like circuit, which still operates at Nyquist frequency to avoid input aliasing. Our evaluation shows that AICs are resolution limited, though they may enable a 2x energy reduction for low amplifier gains and very sparse signals[5<\/a>]<\/sup>.<\/p>\n

There is little literature on CS recovery hardware. As an initial step, we explored the implementation design space for a matching pursuit<\/i> (MP) algorithm; see Figure 2 (insert)[7<\/a>]<\/sup>. We chose MP as it is the simplest possible recovery algorithm, so that we may gain critical first insights. MP is a greedy (iterative) algorithm that estimates a sparse sample in each iteration and produces the full estimate once it halts. The figure also shows the basic implementation blocks where we found that the max-correlation unit, which consists of multipliers, dominates the energy expenditure. The energy-cost evaluation in Figure 2 shows diminishing returns around 20 multipliers, at 1 V supply, in 45-nm CMOS technology.\u00a0 Overall, at 8 bits resolution and 10 fixed iterations, the energy cost of recovery is 2.8 nJ\/sample, with an area of 0.4 mm2 <\/sup>at a minimum-energy throughput of 2.5 mega-samples\/s at 0.4 V supply. Since the algorithm is block-parallel, a further throughput increase comes with a linear increase in area.<\/p>\n\n\t\t