{"id":5580,"date":"2012-07-18T22:28:05","date_gmt":"2012-07-18T22:28:05","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/?p=5580"},"modified":"2012-07-18T22:28:05","modified_gmt":"2012-07-18T22:28:05","slug":"high-efficiency-low-cost-photovoltaics-using-iii-v-on-silicon-tandem-cells","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/high-efficiency-low-cost-photovoltaics-using-iii-v-on-silicon-tandem-cells\/","title":{"rendered":"High-efficiency, Low-cost Photovoltaics using III-V on Silicon Tandem Cells"},"content":{"rendered":"<p>Photovoltaics and sustainability have received much attention lately. We seek a tandem photovoltaic device using silicon as both the substrate and lower cell and GaAsP as the upper cell. The ideal band gaps for this two-cell tandem structure with silicon at 1.1eV and GaAsP at 1.75 eV allow access to the highest efficiency possible for a two-cell tandem, 36.5%. The lattice mismatch between GaP and Si is 0.37%; therefore, these two materials constitute a nearly ideal combination for the integration of Si and III\u2013V semiconductor-based technologies. Nevertheless, defect-free heteroepitaxy of GaP on Si has been a major challenge.<\/p>\n<p>One can envision a process in which a Si<sub>1-x<\/sub>Ge<sub>x<\/sub> graded buffer is grown on a Si wafer to extend the lattice parameter part of the way to GaAs, at which point a lattice-matched GaAs<sub>y<\/sub>P<sub>1-y<\/sub> is grown on the Si<sub>1-x<\/sub>Ge<sub>x<\/sub> surface, followed by tensile grading of the GaAs<sub>y<\/sub>P<sub>1-y<\/sub> until GaP is reached. Identifying the composition where the transition can be made from Si<sub>1-x<\/sub>Ge<sub>x<\/sub> to GaAs<sub>y<\/sub>P<sub>1-y<\/sub> depending on the application is an integral objective of this study. This identification will provide the flexibility to engineer the lattice constants from Si to Ge and GaP to GaAs while maintaining low threading dislocation density (TDD) and surface morphology suitable for device processing. This study has achieved the successful growth of high-quality lattice-matched GaAs<sub>y<\/sub>P<sub>1-y<\/sub> on Si<sub>0.5<\/sub>Ge<sub>0.5<\/sub>, Si<sub>0.4<\/sub>Ge<sub>0.6<\/sub>, and Si<sub>0.3<\/sub>Ge<sub>0.7<\/sub> virtual substrates. Various characterization techniques clearly reveal a high-quality crystalline interface (Figure 1) between Si<sub>1-x<\/sub>Ge<sub>x<\/sub> and GaAs<sub>y<\/sub>P<sub>1-y<\/sub> with low TDD suitable for device processing, no rampant dislocation nucleation, anti-phase boundaries, stacking faults or other crystalline defects.\u00a0 Further work will explore the temperature window for the epitaxial growth of GaAs<sub>y<\/sub>P<sub>1-y<\/sub> on Si<sub>1-x<\/sub>Ge<sub>x<\/sub> with higher Si content, as the end goal is to obtain a defect-free GaP film on Si substrate.<\/p>\n<div id=\"attachment_5581\" style=\"width: 610px\" class=\"wp-caption alignnone\"><a href=\"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/files\/2012\/07\/sharma_photovoltaics_01.jpg\" rel=\"lightbox[5580]\"><img aria-describedby=\"caption-attachment-5581\" loading=\"lazy\" class=\"size-full wp-image-5581\" title=\"sharma_photovoltaics_01\" src=\"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/files\/2012\/07\/sharma_photovoltaics_01.jpg\" alt=\"Figure 1\" width=\"600\" height=\"268\" srcset=\"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-content\/blogs.dir\/15\/files\/2012\/07\/sharma_photovoltaics_01.jpg 600w, https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-content\/blogs.dir\/15\/files\/2012\/07\/sharma_photovoltaics_01-300x134.jpg 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/a><p id=\"caption-attachment-5581\" class=\"wp-caption-text\">Figure 1: Cross-sectionalbright field TEM of GaAsyP1-y on (a) Si0.5Ge0.5 and (b) Si0.4Ge0.6 virtual substrates on 6\u00b0 offcut towards the nearest {111} plane Si (001) substrate.<\/p><\/div>\n","protected":false},"excerpt":{"rendered":"<p>Photovoltaics and sustainability have received much attention lately. We seek a tandem photovoltaic device using silicon as both the substrate&#8230;<\/p>\n","protected":false},"author":1,"featured_media":5581,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":[],"categories":[28,6,8,6083],"tags":[19,11531,4135],"_links":{"self":[{"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/posts\/5580"}],"collection":[{"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/comments?post=5580"}],"version-history":[{"count":3,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/posts\/5580\/revisions"}],"predecessor-version":[{"id":6414,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/posts\/5580\/revisions\/6414"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/media\/5581"}],"wp:attachment":[{"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/media?parent=5580"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/categories?post=5580"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/wp-json\/wp\/v2\/tags?post=5580"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}