{"id":5485,"date":"2012-07-18T22:28:21","date_gmt":"2012-07-18T22:28:21","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/?p=5485"},"modified":"2012-07-18T22:28:21","modified_gmt":"2012-07-18T22:28:21","slug":"an-ultra-low-voltage-mixed-signal-front-end-for-a-wearable-ecg-monitor","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2012\/an-ultra-low-voltage-mixed-signal-front-end-for-a-wearable-ecg-monitor\/","title":{"rendered":"An Ultra-low-voltage Mixed-signal Front-end for a Wearable ECG Monitor"},"content":{"rendered":"

Circuits for wearable vital sign monitors have very stringent requirements on power dissipation due to limited energy storage capacity and the need for a long lifetime.\u00a0 Extending the time between battery recharge or replacement requires low-power electronics.\u00a0 We report a micro-watt mixed-signal front-end (MSFE) for ECG monitoring [1<\/a>] <\/sup> that uses aggressive voltage scaling to maximize power-efficiency and ensure compatibility with low-voltage DSPs [2<\/a>] <\/sup>.\u00a0 The MSFE shown in Figure 1 rejects 50\/60Hz power-line interference (PLI) at the input of the system by using a mixed-signal feedback loop, enabling low-voltage operation by reducing dynamic range requirements.\u00a0 Analog circuits are optimized for ultra-low-voltage, and a SAR ADC with a dual-DAC architecture eliminates the need for a power-hungry ADC buffer. Oversampling and \u0394\u03a3-modulation leveraging integrated digital processing are used to achieve ultra-low-power operation without sacrificing noise performance and dynamic range.\u00a0 Figure 2 shows ECG measurements on a male subject with the MSFE using gel electrodes and unshielded wiring.\u00a0 The PLI is clearly canceled when the PLI filter is enabled. The MSFE was prototyped in a 0.18\u00b5m CMOS process and consumes 2.9\u00b5W from 0.6V.<\/p>\n\n\t\t