{"id":3377,"date":"2011-07-05T21:05:16","date_gmt":"2011-07-05T21:05:16","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2011\/?p=3377"},"modified":"2011-07-19T20:29:21","modified_gmt":"2011-07-19T20:29:21","slug":"a-broadcast-optimized-low-swing-signaling-based-on-chip-network-in-45nm-soi-cmos","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2011\/a-broadcast-optimized-low-swing-signaling-based-on-chip-network-in-45nm-soi-cmos\/","title":{"rendered":"A Broadcast-optimized, Low-Swing Signaling-based On-Chip Network in 45nm SOI CMOS"},"content":{"rendered":"

Designing on-chip networks optimized for a cache coherence protocol is critical for many-core processors to achieve peak efficiency in energy, latency, and throughput performance. Considering that advanced cache coherence protocols [1<\/a>] <\/sup> [2<\/a>] <\/sup> [3<\/a>] <\/sup> count on a combination of multicasts, broadcasts, and direct requests, it is essential to optimize on-chip networks for one-to-many multicasts and broadcasts. In addition, since such bandwidth-hungry on-chip networks consume substantial energy in their data path, energy-efficient crossbar switches and links are required.<\/p>\n

This work presents broadcast-optimized, low-swing signaling-based on-chip networks. The proposed on-chip networks feature (1) multicast buffer bypassing flow control, (2) a broadcast-optimized crossbar switch, and (3) low-swing signaling in the data path. The multicast bypassing scheme generates multiple lookahead signals, one corresponding to each output port out of which the flit forks. To maximize bypassing efficiency, output port requests of the incoming lookahead signals are prioritized over the requests of other flits buffered at the same input port. When the lookahead wins all of its output ports, the intermediate router sets up the bypass control signals that allow the flit to connect directly to the crossbar and link, instead of getting buffered. For the broadcast-optimized crossbar switch and low-swing signaling in the data path, a tri-state RSD-based crossbar is presented. The proposed low-swing crossbar features (1) an inherent power gating circuit, (2) higher bandwidth driven by linear-mode RSD, (3) a longer low-swing signaling data path from cross points to link RXs, (4) SOI-friendly circuit design, and (5) potential to be integrated into the CAD synthesis flow.<\/p>\n\n\t\t