{"id":3352,"date":"2011-07-05T20:40:01","date_gmt":"2011-07-05T20:40:01","guid":{"rendered":"https:\/\/mtlsites.mit.edu\/annual_reports\/2011\/?p=3352"},"modified":"2011-07-19T20:28:29","modified_gmt":"2011-07-19T20:28:29","slug":"low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts","status":"publish","type":"post","link":"https:\/\/mtlsites.mit.edu\/annual_reports\/2011\/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts\/","title":{"rendered":"Low Temperature Gate Dielectric Deposition for Recessed AlGaN\/GaN MIS-HEMTs"},"content":{"rendered":"

The use of gate dielectrics in AlGaN\/GaN high electron mobility transistors (MIS-HEMTs) is attracting great interest for power applications since gate dielectrics improve the Ion<\/sub>\/Ioff<\/sub> ratio and reduce gate leakage in transistors. However, gate dielectrics prevent commonly used technologies like recessed gates. By using dielectrics deposited at low temperatures, we can design a self-aligned process in which the gate is lithographically patterned, the gate is recessed, and then the dielectric is deposited before the gate metal deposition. However, it has been reported that these dielectrics are of lower quality [1<\/a>] <\/sup> [2<\/a>] <\/sup>.\u00a0 The purpose of this study is to investigate how dielectric material, deposition temperatures, and annealing conditions impact the quality of AlGaN\/GaN MIS-HEMTs with low temperature gate dielectrics.<\/p>\n

AlGaN\/GaN\/ MIS-HEMTs with HfO2<\/sub> and Al2<\/sub>O3<\/sub> gate dielectrics were fabricated and studied with a reference Schottky gate transistor.\u00a0 These dielectrics were deposited at temperatures ranging from 80 \u00b0C to 120 \u00b0C.\u00a0 Following the gate metal deposition, different samples were annealed from 400C to 600C in either nitrogen or forming gas ambient.\u00a0 The best HfO2<\/sub> transistors had a steeper subthreshold slope (71 mV\/dec) than the best Al2<\/sub>O3<\/sub> transistors (82 mV\/dec) and the best Schottky gate transistors (142 mV\/dec) as seen in Figure 1.\u00a0\u00a0 For all MIS-HEMTs, we found that annealing the transistors at 400 \u00b0C and increasing the deposition temperature improved the subthreshold slope the most.\u00a0 In addition, we evaluated the Ion<\/sub>\/Ioff<\/sub> ratio of these transistors.\u00a0 As seen in Figure 2, the devices with HfO2<\/sub> exhibited Ion<\/sub>\/Ioff<\/sub> ratios on the order of 109<\/sup>, which was 4 orders higher than the best devices with Schottky gates.<\/p>\n

To summarize, we show that by annealing low temperature gate oxides, low temperature MIS-HEMTs demonstrate performance better than Schottky gate transistors with respect to subthreshold slopes and Ion<\/sub>\/Ioff<\/sub> ratios.\u00a0 These low temperature annealed oxides are very promising for combining fabrication technologies like submicron recessed gate transistors with gate dielectrics.<\/p>\n\n\t\t