{"id":895,"date":"2010-06-28T14:24:18","date_gmt":"2010-06-28T18:24:18","guid":{"rendered":"https:\/\/wpmu2.mit.local\/?p=895"},"modified":"2010-06-29T14:24:47","modified_gmt":"2010-06-29T18:24:47","slug":"accurate-mobility-measurements-of-gate-all-around-si-nanowire-p-mosfets-with-conformal-high-kmetal-gate-stack","status":"publish","type":"post","link":"https:\/\/wpmu2.mit.local\/accurate-mobility-measurements-of-gate-all-around-si-nanowire-p-mosfets-with-conformal-high-kmetal-gate-stack\/","title":{"rendered":"Accurate Mobility Measurements of Gate-all-around Si Nanowire p-MOSFETs with Conformal High-K\/Metal Gate Stack"},"content":{"rendered":"
\"Figure<\/a><\/p>\n

Figure 1: Measured transfer characteristics of ~15nm diameter gate-all-around nanowire p-MOSFETs with N=500 parallel nanowires and Al2<\/sub>O3<\/sub>\/WN gate stack, demonstrating excellent electrostatics with on-to-off ratio of more than 1010<\/sup>.<\/p>\n<\/div>\n

Gate-all-around (GAA) Si nanowire (NW) transistors are promising candidates for ultimate low-power CMOS integration due to their excellent electrostatics and low-energy consumption. In top-down fabricated Si NWs, excellent sidewalls are desirable to overcome mobility degradation induced by ion-etched sidewalls with high surface roughness scattering. Previous work focused on mobility extraction of relatively thick Si NWs with rough sidewalls and a thermally grown oxide\/poly-Si gate stack [1<\/a>]<\/sup> [2<\/a>]<\/sup> . However, thermal oxide is no longer scalable for aggressively scaled CMOS. In addition, the thickness of the grown oxide depends on the orientation of the Si crystallographic planes, which adds a lot of complexity to the extraction of NW\u2019s mobility and inversion charge density. In this work, GAA Si NW p-MOSFETs were successfully fabricated featuring sub-12-nm NW thickness, smooth side walls achieved by excellent lithography and hydrogen thermal anneal, conformal ALD Al2<\/sub>O3<\/sub>\/WN dielectric, scaled series resistance, and N=500 parallel NWs to obtain a measurable capacitance signal at sub-micron NW gate lengths.<\/p>\n

\"Figure<\/a>

Figure 2: Effective hole mobility as a function of inversion charge density extracted from split C-V and I-V measurements of two similar gate-all-around nanowire MOSFETs with different gate lengths. Increased hole mobility was observed as the NW width is decreased from 75nm down to 15nm.<\/p><\/div>\n

Figure 1 shows the measured transfer characteristics of ~15nm diameter Gate-all-around nanowire p-MOSFETs with a gate length of 0.75 \u00b5m, N=500 parallel NWs, and Al2<\/sub>O3<\/sub>\/WN gate stack, demonstrating excellent electrostatics with an on-to-off ratio of more than 1010<\/sup>. Using low-field conductance and split capacitance-voltage measurements of two-MOSFETs with similar series resistance and parasitic capacitances, effective hole mobility and inversion charge density of the NWs were accurately extracted; the results are shown in Figure 2. Monotonic hole mobility increase is observed as the NW width is decreased from ~75nm to ~15nm. The hole mobility increase is attributed to the increased contribution of high-hole mobility (110) sidewalls as well as stress induced by the WN metal gate.<\/p>\n

\r\nReferences
  1. J. Chen, T. Saraya, K. Miyaji, K. Shimizu, and T. Hiramoto, ” Experimental Study of Mobility in [110]- and [100]-Directed Multiple Silicon Nanowire GAA MOSFETs on (100) SOI,” in IEEE VLSI Tech. Dig.,<\/em> pp. 32-33,\u00a0 2008. [↩<\/a>]<\/li>
  2. O. Gunawan et al., \u201cMeasurement of Carrier Mobility in Silicon Nanowire\u201d Nano Letters<\/em>, vol. 8, no. 6, pp. 1566-1571, Dec. 2008. [↩<\/a>]<\/li><\/ol><\/div>","protected":false},"excerpt":{"rendered":"

    Figure 1: Measured transfer characteristics of ~15nm diameter gate-all-around nanowire p-MOSFETs with N=500 parallel nanowires and Al2O3\/WN gate stack, demonstrating…<\/p>\n<\/div>","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[28],"tags":[52,4083],"_links":{"self":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/895"}],"collection":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/comments?post=895"}],"version-history":[{"count":3,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/895\/revisions"}],"predecessor-version":[{"id":1005,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/895\/revisions\/1005"}],"wp:attachment":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/media?parent=895"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/categories?post=895"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/tags?post=895"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}