<\/a>Figure 1: Geometry of a two-turn, 1-mm side-length, square inductor with surface roughness. The inductor is discretized using 2.500 spatial elements. The roughness is modeled using 400 random parameters.<\/p><\/div>\n
Uncertainties in the integrated circuit manufacturing processes typically result in interconnect structures, whose dimensions and shapes deviate from the original design intent. Such geometrical variations are typically assumed to be random, and they affect the electrical performance of the manufactured interconnect structures. Consequently, the effect of such variations on the electrical performance of the manufactured interconnects needs to be estimated and accounted for during the design phase. To achieve such an objective, one needs to develop efficient variation-aware parasitic extraction tools. There are two different categories of algorithms for variation-aware extraction, namely, \u201cintrusive\u201d and \u201cnon-intrusive.\u201d \u201cNon-intrusive\u201d algorithms are those that rely on sampling the parameter space and then using any standard deterministic solver to compute a deterministic solution at the different sampling points. The main challenge facing such methods is the need to simultaneously and efficiently solve a very large number of linear systems corresponding to each different sample point. The term \u201cintrusive\u201d refers to the fact that the solution is computed using specialized stochastic algorithms, such as the stochastic Galerkin method [