{"id":753,"date":"2010-06-25T12:45:34","date_gmt":"2010-06-25T16:45:34","guid":{"rendered":"https:\/\/wpmu2.mit.local\/?p=753"},"modified":"2010-06-29T15:09:15","modified_gmt":"2010-06-29T19:09:15","slug":"re-architecting-dram-memory-systems-with-monolithically-integrated-silicon-photonics","status":"publish","type":"post","link":"https:\/\/wpmu2.mit.local\/re-architecting-dram-memory-systems-with-monolithically-integrated-silicon-photonics\/","title":{"rendered":"Re-architecting DRAM Memory Systems with Monolithically Integrated Silicon Photonics"},"content":{"rendered":"

The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of electrical DRAM architectures appears unlikely to suffice, being constrained by processor and DRAM pin-bandwidth density and by total DRAM chip power, including off-chip signaling, cross-chip interconnect, and bank access energy. In this work, we redesign the DRAM main-memory system using a proposed monolithically integrated silicon-photonic technology and show that our photonically interconnected DRAM (PIDRAM) provides a promising solution to all of these issues. Photonics provides high aggregate pin-bandwidth density through dense wavelength-division multiplexing (WDM). Photonic signaling provides energy-efficient communication, which we exploit not only to reduce chip-to-chip interconnect power but to also reduce cross-chip interconnect power by extending the photonic links deep into the actual PIDRAM chips. To complement these large improvements in interconnect bandwidth and power, we decrease the number of bits activated per bank to improve the energy efficiency of the PIDRAM banks themselves. Our most promising design point yields approximately a 10\u00b4 power reduction for a single-chip PIDRAM channel with similar throughput and area as a projected future electrical-only DRAM. Finally, we propose optical power guiding as a new technique that allows a single PIDRAM chip design to be used efficiently in several multi-chip configurations that provide either increased aggregate capacity or bandwidth.
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\"Figure<\/a> <\/dt>\n
Figure 1: Optical power-guided PIDRAM memory system. Each memory channel connects to a PIDRAM DIMM via a \ufb01ber ribbon. The memory controller manages the command bus (CB), write-data bus (WDB), and read-data bus (RDB), which all sit on the same fiber using WDM. Each PIDRAM chip can also have a number of different floorplans, shown on the right. Pn<\/em> are photonics floorplans, where the number n<\/em> represents the number of rows of data access points. <\/dd>\n<\/dl>\n
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\"Figure<\/a> <\/dt>\n
Figure 2: Energy\/bit breakdown of a single-chip PIDRAM channel for floorplans of three representative PIDRAM configurations: (a) 64 banks, 4 I\/Os per array core; (b) 64 banks, 32 I\/Os per array core; and (c) 8 banks, 32 I\/Os per array core. E1<\/em> is the baseline electrical floorplan. <\/dd>\n<\/dl>\n



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The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding…<\/p>\n<\/div>","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[26,12],"tags":[68],"_links":{"self":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/753"}],"collection":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/comments?post=753"}],"version-history":[{"count":6,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/753\/revisions"}],"predecessor-version":[{"id":1033,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/753\/revisions\/1033"}],"wp:attachment":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/media?parent=753"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/categories?post=753"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/tags?post=753"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}