{"id":654,"date":"2010-06-25T10:17:50","date_gmt":"2010-06-25T14:17:50","guid":{"rendered":"https:\/\/wpmu2.mit.local\/?p=654"},"modified":"2010-08-05T10:00:06","modified_gmt":"2010-08-05T14:00:06","slug":"fastcaplet-an-efficient-3-d-capacitance-extraction-solver-for-vlsi-interconnects-using-instantiable-basis-functions","status":"publish","type":"post","link":"https:\/\/wpmu2.mit.local\/fastcaplet-an-efficient-3-d-capacitance-extraction-solver-for-vlsi-interconnects-using-instantiable-basis-functions\/","title":{"rendered":"FastCaplet: An Efficient 3-D Capacitance Extraction Solver for VLSI Interconnects Using Instantiable Basis Functions"},"content":{"rendered":"
\"Figure<\/a>

Figure 1: (a) The 3D view of a pair of crossing wires. The upper wire is stretched out to three different widths. (b) The top view of the geometry (c) The front view of the lower wire and the charge distribution induced by the upper wire of three different widths (d) The definition of arch and flat shapes extracted from the distribution induced by the widest upper wire. Those shapes are reusable in other VLSI geometries.<\/p><\/div>\n

State-of-the-art capacitance extraction methods for Integrated Circuits (IC) involve scanning 2-D cross sections and interpolating 2-D capacitance values using a table-lookup approach. This approach is fast and accurate for a large percentage of IC wires. It is, however, quite inaccurate for full 3-D structures, such as comb capacitors or crossing wires in adjacent metal layers. These cases require electrostatic field solvers. Unfortunately, standard field solvers are inherently very time-consuming, making them completely impractical in typical IC design flows. Even fast matrix-vector product approaches (e.g., fast-multipole [1<\/a>]<\/sup> or pre-corrected FFT [2<\/a>]<\/sup> ) have a significant computational overhead and start to scale linearly with the number of conductors only when there are more than several hundred wires. In this project we are developing a new 3-D extraction field solver that is extremely efficient, especially for the smaller scale extraction problems: the full 3-D structures comprising ten to one hundred conductors that cannot be handled by the 2-D scanning and table-lookup approach.<\/p>\n

\"Figure<\/a>

Figure 2: Partially overlapping wires are extracted by (a) traditional boundary element methods with piecewise constant basis functions, using 572 unknowns, and by (b) Fast-Caplet with the instantiable basis functions, using only 17 unknowns. It takes 760 ms and 30 ms to extract for each method, respectively. <\/p><\/div>\n

Because of the highly restrictive design rules of today\u2019s sub-micro to nano-scale IC technologies, template charge distributions extracted from simple model structures can be reused to instantiate (stretch and combine) basis functions in other realistic complicated geometries, such as wire buses and metal capacitors. This “template-instantiation” strategy largely reduces the number of unknowns and computation time without additional overhead as in [3<\/a>]<\/sup>, [4<\/a>]<\/sup>. This work verifies that only two fundamental templates, shown in Figure 1, are required for virtually all valid IC geometries [5<\/a>]<\/sup>. Also, this work shows that when considering practical aspect ratios and wire spacing, the edge and corner charge singularities [6<\/a>]<\/sup> can be totally neglected for a target 5% error in capacitance. In the example in Figure 2, a preliminary MATLAB version of our algorithm runs 25 times faster and requires 33 times fewer unknowns compared to using standard piecewise constant basis functions.<\/p>\n

\r\nReferences
  1. K. Nabors and J. White, \u201cFast-Cap: A Multipole-Accelerated 3-D Capacitance Extraction Program,\u201d IEEE Transactions on Computer-Aided Design, vol.10, no. 10, pp. 1447-1459, November 1991. [↩<\/a>]<\/li>
  2. J.R. Phillips and J.K. White, \u201cA Precorrected-FFT method for Electrostatic Analysis of Complicated 3-D Structures,\u201d IEEE Trans. on Computer-Aided Design<\/em>, vol. 16, no.10, pp. 059-1072, October 1997. [↩<\/a>]<\/li>
  3. K. Nabors and J. White, \u201cFast-Cap: A Multipole-Accelerated 3-D Capacitance Extraction Program,\u201d IEEE Transactions on Computer-Aided Design, vol.10, no. 10, pp. 1447-1459, November 1991. [↩<\/a>]<\/li>
  4. J.R. Phillips and J.K. White, \u201cA Precorrected-FFT method for Electrostatic Analysis of Complicated 3-D Structures,\u201d IEEE Trans. on Computer-Aided Design<\/em>, vol. 16, no.10, pp. 059-1072, October 1997. [↩<\/a>]<\/li>
  5. Y-C. Hsiao, T. El-Moselhy, L. Daniel, \u201cEfficient Capacitance Solver for 3D Interconnect Based on Template-Instantiated Basis Functions<\/a>,\u201d Proceedings of the 18th Conference on Electrical Performance of Electronic Packaging and Systems<\/em>, pp. 179-182, Portland, Oregon, 2009. [↩<\/a>]<\/li>
  6. Y. Zhang, A. H. Zemanian, \u201cContributions of corner singularities of the capacitances of interconnections wires,\u201d IEEE International Symposium on Circuits and Systems<\/em>, 1995 [↩<\/a>]<\/li><\/ol><\/div>","protected":false},"excerpt":{"rendered":"

    State-of-the-art capacitance extraction methods for Integrated Circuits (IC) involve scanning 2-D cross sections and interpolating 2-D capacitance values using a…<\/p>\n<\/div>","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[26],"tags":[4038,48,4039],"_links":{"self":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/654"}],"collection":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/comments?post=654"}],"version-history":[{"count":10,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/654\/revisions"}],"predecessor-version":[{"id":2339,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/654\/revisions\/2339"}],"wp:attachment":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/media?parent=654"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/categories?post=654"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/tags?post=654"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}