{"id":274,"date":"2010-06-08T15:56:28","date_gmt":"2010-06-08T19:56:28","guid":{"rendered":"https:\/\/wpmu2.mit.local\/?p=274"},"modified":"2010-08-04T10:18:49","modified_gmt":"2010-08-04T14:18:49","slug":"duane-s-boning","status":"publish","type":"post","link":"https:\/\/wpmu2.mit.local\/duane-s-boning\/","title":{"rendered":"Duane S. Boning"},"content":{"rendered":"
N. Drego, A. Chandrakasasan, D. Boning, \u201cLack of Spatial Correlation in MOSFET Threshold Voltage Variation and Implications for Voltage Scaling,\u201d IEEE Transactions on Semiconductor Manufacturing<\/em>, vol. 22, no. 2, pp. 245-255, May 2009.<\/p>\n H. Taylor, Y.-C. Lam, and D. Boning, \u201cA computationally simple method for simulating the micro-embossing of thermoplastic layers,\u201d Journal Micromechanics and Microengineering<\/em>, vol. 19, no. 7, p. 075007 (16 pp), July 2009.<\/p>\n Z. Xu, H. K. Taylor, D. S. Boning, S. F. Yoon, and K. Youcef-Toumi, \u201cLarge-area and high-resolution distortion measurement based on moir\u00e9 fringe method for hot embossing process,\u201d Optics Express<\/em>, vol. 17, no. 21, pp. 18394-18407, Oct. 2009.<\/p>\n N. Drego, A. Chandrakasan, and D. Boning, \u201cAll-Digital Circuits for Measurement of Spatial Variation in Digital Circuits,\u201d IEEE Journal Solid-State Circuits<\/em>, vol. 45, no. 3, pp. 640-651, March 2010.<\/p>\n W. Fan, D. Boning, L. Charns, H. Miyauchi, H. Tano, and S. Tsuji, \u201cStudy on Hardness and Conditioning Effects of CMP Pad Based on Physical Die-level CMP Model,\u201d Journal of the Electrochemical Society<\/em>, pp. H526-H533, vol. 157, no. 5, May 2010.<\/p>\n H. Taylor, M. Hale, Y. C. Lam, and D. Boning, \u201cA method for the accelerated simulation of micro-embossed topographies in thermoplastic polymers,\u201d Journal of Micromechanics and Microengineering<\/em>, vol. 20, no. 6, p. 065001:1-11, June 2010.<\/p>\n D. Boning, J. Johnson, H. McCulloh, and N. Patel, \u201cThe Evolution of Pattern-Density in CMP Modeling,\u201d Symposium on Chemical-Mechanical Planarization, Materials Research Society Spring Meeting<\/em>, San Francisco, CA, April 2009.<\/p>\n K. Balakrishnan and D. Boning, \u201cMeasurement and Analysis of Contact Plug Resistance Variability,\u201d Custom Integrated Circuits Conference (CICC),<\/em> pp. 415-422, San Jose, CA, Oct. 2009.<\/p>\n H. Taylor and D. Boning, \u201cFast simulation of pattern dependencies in thermal nanoimprint lithography,\u201d International Conference on Nanoimprint and Nanoprint Technology (NNT<\/em>), paper C14 (2 pages), San Jose, CA, Nov. 2009.<\/p>\n H. Taylor and D. Boning, \u201cTowards nanoimprint lithography-aware layout design checking,\u201d SPIE Advanced Lithography, Design for Manufacturability through Design-Process Integration IV, Proc. of SPIE<\/em> Vol. 7641, paper 7641-29 (12 pages), San Jose, CA, Feb. 2010.<\/p>\n D. Boning, \u201cCMP Mechanisms and Models: Progress and Challenges,\u201d Keynote, Symposium V: CMP and Post-CMP Cleaning, China Semiconductor Technology International Conference (CSTIC)<\/em>, Shanghai, China, March 18-19, 2010.<\/p>\n D. Boning and J. M. Johnson, \u201cSlurry Particle Agglomeration Model for Chemical Mechanical Planarization (CMP),\u201d paper E4.3, Chemical-Mechanical Planarization Symposium, Materials Research Society Spring Meeting<\/em>, San Francisco, April 2010.<\/p>\n D. Boning and W. Fan, \u201cCharacterization and Modeling of Pad Asperity Response in CMP,\u201d paper E5.4, Chemical-Mechanical Planarization Symposium, Materials Research Society \u00a0Spring Meeting<\/em>, San Francisco, April 2010.<\/p>\n B.W. Anthony, D.S. \u00a0Boning,\u00a0S.\u00a0F.\u00a0Yoon, K. Youcef-Toumi, Z. P. Fang, D. Ljubicic, S. Li, I. Reading, V. Shilpiekandula, H.\u00a0K.\u00a0Taylor, Z. Xu, and J. Zhao, \u201cMetrology and Process Control for Manufacturing of Microfluidic Devices,\u201d Symposium on Manufacturing of Microfluidic Devices<\/em>, NTU, Singapore, January 21, 2010.<\/p>\n<\/div>","protected":false},"excerpt":{"rendered":" Design for manufacturability (DFM) of processes, devices, and integrated circuits. Characterization and modeling of variation in semiconductor and MEMS manufacturing, with emphasis on chemical-mechanical polishing (CMP), electroplating, plasma etch, and embossing processes.<\/p>\n<\/div>","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[80],"tags":[18,44],"_links":{"self":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/274"}],"collection":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/comments?post=274"}],"version-history":[{"count":2,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/274\/revisions"}],"predecessor-version":[{"id":2330,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/posts\/274\/revisions\/2330"}],"wp:attachment":[{"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/media?parent=274"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/categories?post=274"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/wpmu2.mit.local\/wp-json\/wp\/v2\/tags?post=274"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}