{"id":1312,"date":"2010-07-02T13:47:44","date_gmt":"2010-07-02T17:47:44","guid":{"rendered":"https:\/\/wpmu2.mit.local\/?p=1312"},"modified":"2010-07-02T13:48:23","modified_gmt":"2010-07-02T17:48:23","slug":"advanced-substrate-engineering-integration-of-inp-lattice-constant-on-si","status":"publish","type":"post","link":"https:\/\/wpmu2.mit.local\/advanced-substrate-engineering-integration-of-inp-lattice-constant-on-si\/","title":{"rendered":"Advanced Substrate Engineering: Integration of InP Lattice Constant on Si"},"content":{"rendered":"

Integration of the InP lattice constant with Si CMOS platforms is motivated by the monolithic interconnection of III\/V optoelectronic and electronic devices with the highly integrated Si logic. However, integration of InP on Si requires a comprehensive solution that addresses lattice mismatch, thermal expansion mismatch, IV\/III-V integration, and alloy engineering challenges.<\/p>\n

We investigated III\/V graded (\u00d1) buffers on 6\u02da offcut GaAs substrate in combination with 6\u02da offcut Ge-on-Insulator (GeOI) substrate to integrate the InP lattice constant on Si. First, we chose 6\u02da offcut GeOI as the substrate to accommodate the antiphase disorder in the IV\/III-V integration [1<\/a>]<\/sup> and established excellent GaAs epitaxy on the substrate with proper surface preparation. Then we investigated two approaches to integrate III\/V alloys up to InP lattice constant on 6\u02da offcut GaAs: GaAs\/\u00d1Inx<\/sub>Ga1-x<\/sub>As\/\u00d1Iny<\/sub>Ga1-y<\/sub>P\/InP and GaAs\/\u00d1GaAs1-x<\/sub>Sbx<\/sub>. For the GaAs\/\u00d1Inx<\/sub>Ga1-x<\/sub>As\/\u00d1Iny<\/sub>Ga1-y<\/sub>P\/InP approach, we demonstrated the integration of InP on 6\u02da offcut GaAs with threading dislocation density of 7.9×106<\/sup> \/cm2<\/sup> and surface roughness of 30.0 nm. The second approach used \u00d1GaAs1-x<\/sub>Sbx<\/sub> alloys with compositional grading of the Sb concentration. Graded mixed-anion GaAsSb alloys grown at 575\u00b0C did not exhibit phase separation, resulting in higher quality InP lattice constant films on GaAs than the first method. A GaAsSb alloy (with a grading rate ~ 1.06% strain\/um) lattice-matched to InP on 6\u00b0 offcut bulk GaAs with threading dislocation density of 4.7×106<\/sup> cm-2<\/sup> and roughness of 7.4 nm was demonstrated. The threading dislocation density of the GaAsSb graded buffer can be further lowered to 2.7×106<\/sup> cm-2<\/sup> if a lower grading rate (0.64% strain\/um) is used.<\/p>\n